Commit Graph

17 Commits

Author SHA1 Message Date
Kumar Gala bf53ebf2c8 arch: convert to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  There are few places we dont convert over to the new
types because of compatiability with ext/HALs or for ease of transition
at this point.  Fixup a few of the PRI formatters so we build with newlib.

Jira: ZEP-2051

Change-Id: I7d2d3697cad04f20aaa8f6e77228f502cd9c8286
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 12:08:12 +00:00
Benjamin Walsh ee659ae1a1 build: add _ASMLANGUAGE to all asm files
This avoids asm files from having to explicitly define the _ASMLANGUAGE
symbol themselves.

Change-Id: I71f5a169f75d7443a58a0365a41c55b20dae3029
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-01-24 13:34:51 +00:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif cb888e6805 kernel: remove nano/micro wording and usage
Also remove some old cflags referencing directories that do not exist
anymore.
Also replace references to legacy APIs in doxygen documentation of
various functions.

Change-Id: I8fce3d1fe0f4defc44e6eb0ae09a4863e33a39db
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-19 19:58:03 +00:00
Benjamin Walsh f6ca7de09c kernel/arch: consolidate tTCS and TNANO definitions
There was a lot of duplication between architectures for the definition
of threads and the "nanokernel" guts. These have been consolidated.

Now, a common file kernel/unified/include/kernel_structs.h holds the
common definitions. Architectures provide two files to complement it:
kernel_arch_data.h and kernel_arch_func.h. The first one contains at
least the struct _thread_arch and struct _kernel_arch data structures,
as well as the struct _callee_saved and struct _caller_saved register
layouts. The second file contains anything that needs what is provided
by the common stuff in kernel_structs.h. Those two files are only meant
to be included in kernel_structs.h in very specific locations.

The thread data structure has been separated into three major parts:
common struct _thread_base and struct k_thread, and arch-specific struct
_thread_arch. The first and third ones are included in the second.

The struct s_NANO data structure has been split into two: common struct
_kernel and arch-specific struct _kernel_arch. The latter is included in
the former.

Offsets files have also changed: nano_offsets.h has been renamed
kernel_offsets.h and is still included by the arch-specific offsets.c.
Also, since the thread and kernel data structures are now made of
sub-structures, offsets have to be added to make up the full offset.
Some of these additions have been consolidated in shorter symbols,
available from kernel/unified/include/offsets_short.h, which includes an
arch-specific offsets_arch_short.h. Most of the code include
offsets_short.h now instead of offsets.h.

Change-Id: I084645cb7e6db8db69aeaaf162963fe157045d5a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-12 07:04:52 -05:00
Andrew Boie 7a6272f846 nios2: assume IRQ stack pointer and size already aligned
This is now done in nano_init.c.

Change-Id: I6a55df8c33e23a0899fb4186696a6601e3f01aa3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-21 15:04:05 +00:00
Andrew Boie 0b6c4febf1 nios2: get CPU features from ALT_CPU_* namespace
NIOS2_* namespace is deprecated.

Change-Id: I5a9b07ee33b20aa18509e9d789837f48199ab25d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-12 18:09:53 +00:00
Andrew Boie ef29812d51 nios2: support more global pointer scenarios
We now allow use of -mgpopt=global and -mgpopt=data. The 'global'
option is now the default instead of compiler-default local, expanding
global pointer usage to all small data in the system.

For systems where all RAM is less than 64K, the 'data' option may be
appropriate.

Some fixes had to be made to the system in order to get around some
issues:

* prep_c.c no longer uses fake linker variables to figure out the size
of data or BSS, as these gave the linker fits as it tried to compute
relative addresses to them.

* _k_task_ptr_idle is create by sysgen and placed in a special section.
Any small data in a special section needs to be declared extern
with __attribute__((section)) else the compiler will assume it's in
.sdata.

* same situation with extern references to k_pipe_t (fixed pipe_priv
test)

For legacy applications being ported to Nios II which do things that
freak out global pointer calculation, it can be disabled entirely.

Change-Id: I5eb86ee8aefb8e2fac49c5cdd104ee19cea23f6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-06 18:14:31 +00:00
Andrew Boie fca3591bce nios2: enable use of global pointer indirect addressing
needs to be 0x8000 after .sdata and .sbss sections since
register offsets are 16-bit signed values.

Change-Id: Ia7486d32af81e54a6ebac6be7ec308dfdeafe79e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-06 16:33:32 +00:00
Andrew Boie 231e617593 nios2: enable instruction/data caches
The caches get initialized on boot and flushed after XIP copy
takes place.

Change-Id: I642a14232835a0cf41e007860f5cdb8a2ade1f50
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-01 00:34:47 +00:00
Andrew Boie 31196d78aa nios2: add config option to include reset vector
Change-Id: I0e6257f30eb2ca778c094c0faa3721dc62e18d86
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-29 05:23:56 +00:00
Andrew Boie 5846018d0d nios2: crt0: fix GDB debugging
When an image is sent over the wire with the GDB 'load' command,
it tries to start execution from the __start symbol, which needs to
be in RAM. Since the reset vector is in ROM, name it something else.

Change-Id: Id0bbfa76db9a8a81bd7ff20be3f2baec81eae15e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-22 01:31:12 +00:00
Andrew Boie 0d9b755bb1 nios2: ensure stack pointer is properly aligned
Kconfig doesn't enforce any kind of alignment when specifying the
ISR stack size. Perform the assembly equivalent of STACK_ROUND_DOWN.

Change-Id: Ib7fb72ff7db8a3aa20ec6d0c59a03aa8227f6671
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-22 01:31:11 +00:00
Andrew Boie 464676510b nios2: crt0: init interrupt stack as well
CONFIG_INIT_STACKS should initialize all stack regions
with 0xaa. Make sure the initial interrupt stack gets this
as well. Take care not to exceed the bounds of the array
if it is not 4-byte aligned.

Change-Id: Ib23329ac84a5a8515272be2944f948e8faba65b3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-22 01:31:10 +00:00
Andrew Boie 31e8030c05 nios2: set initial stack pointer to the interrupt stack
Change-Id: I5a71215dde9e7fdc7d5d9de5297f5f493de40ca8
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-10 15:22:39 +00:00
Andrew Boie 191f1df574 nios2: crt0: split into __start and __text_start
__start is the CPU's reset vector. In a typical Nios II configuration,
the exception vector is 0x20 bytes after the reset vector, severely
constraining the amount of code that can go in here.

Split this into __start and __text_start. The only thing that __start
really need to do is init the instruction cache and jump into
__text_start.

JIRA IDs placed in comments for missing items.

Change-Id: I3c6b8ed65e8fcf6b6a735b80cf007d0180599230
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-10 15:22:39 +00:00
Andrew Boie 2d5645e57a nios2: add minimal crt0.S
At the moment this just jumps into prep_c, with comments left
on other things that need to be done. Having this here ensures that
the early boot code isn't discarded by gc-sections.

vector_table.c removed, it isn't the right approach for this CPU.
Proper method for initializing reset and exception vectors still
being investigated.

Change-Id: Id7965c671f1a55c42ecfb65119497405a646bec4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:26 +00:00