Add configuration files for new platform and adapt options
of the benchmarks for those platforms.
Change-Id: I7c5011966c3a99f0b1c2c3fc44ba05b67ac6f953
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This test requires a huge stack and wont fit on Quark SE.
Generated binary is too large due to a large stack size defined.
Change-Id: I3446d614a58db1ab78941799ee41e898368db3b5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This sample depends on functions that are not available in
the MVIC driver.
Disabling while we wait for those to be implemented.
Change-Id: Icd03ef014cbcd890945c0e77e349cccfded62e22
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This will allow tests to be built for this platform.
Change-Id: I2275ec71af6cdb6f71c131fa26c5eae2d91c2475
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The Intel Quark microcontroller D2000, is a low power, battery-operated,
32-bit microcontroller. Within its small footprint, the Intel Quark
microcontroller D2000 includes an Intel Quark ultra-low-power core
running at 32 MHz, with 32k integrated flash and 8k OTP SRAM.
Change-Id: I6ba121996edb0b5fbe596bd6ef3d6e3979ff73e9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This module is based on the standard Local APIC and IO APIC source modules.
This modules combines these modules into one source module that exports the
same APIs defined by the Local APIC and IO APIC header modules. These
routine have been adapted for the Quark D2000 Interrupt Controller which has
a cutdown implementation of the Local APIC & IO APIC register sets.
Change-Id: Ic80aa78918483663d76054ebadefa08d8a3f188a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Adds the register definition for the DW GPIO hardware block.
This set of registers and offsets are specific for the SS
GPIO hardware block in the Quark SE platform.
In particular, the register BOTHEDGE (offset 0x68 in the
main GPIO block) does not exist on the SS GPIO block.
Change-Id: I4e16ec7c8e89015be1fc8bcdb1b7fa5377890b9d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This adds the I2C driver for the Sensor Subsystem on Quark SE.
This provides minimal support for the I2C controller, and does
only synchronous transfer at the moment.
Change-Id: I400b8ff3390d4b641bed5b8c617830c4217de3ff
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Force setting the value in the platform kconfig instead of defaulting
to 0.
Change-Id: Iceeb6346afc4217dd09d31c28898e3693b08f781
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This cause problems with some configurations using hex.
Change-Id: I680c40d46e1fdf3da714f6412c8dda0e1ebb44f9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Keep things consistent across all platforms and make this
configurable and avoid hardcoding in linker.cmd file.
Change-Id: Iddeb5107854139249fda70378e07b83066d8a7a1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit adds the Synopsys source code for the arc ADC driver.
Change-Id: I140a63505685cda8ec9d3174b7cf4fc1e2e91b06
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This adds the driver to support DesignWare AIO/Comparator
under drivers/aio.
Change-Id: Id6cb1b507c0526098f163f74c188e990590797c2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Such controller is found on Quark SE Lakemont and ARC cores. This
driver currently supports the Lakemont core (x86).
Change-Id: Iefebd6ce9dbe81aa3902e7c2d801b07c027c548a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Implements a low-level IPI driver for Quark SE mailboxes.
Configures the Quark SE platform to initialize it and
configure an IPI console from ARC->LMT on channel 4.
Change-Id: I30123771d04c2e06ea6fcca585fd4ef74c0717a7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
These should now work for drivers written for other arches.
Still a hack to do all the IRQ setup at runtime.
Change-Id: I9717f74abef3b9934f9a1c0acbd76d960ed7a3cb
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quark SE provides various clock controllers through its SCSS block.
Peripheral, external, sensor, and others.
This current drivers provides only the clock gating capability, for
peripheral, external and sensor. But it could support divider and more
other features once defined in the generic API.
Note: such clock has _nothing_ to do with a Real Time Clock (RTC).
An RTC provide clock timing like a watch would do. Here the clock
controller is about circuit clocking.
Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding DW real time clock support. This driver is used by the Quark SE
and Quark D2000 SoCs.
Change-Id: Iba8ddee1b1b5fee298db95b63418e152774662a4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The driver should handle the initialization instead of relying on
platform initialization. This is to conform to the driver model.
Change-Id: Idc95d59bce2470b5118e416ee05f07548991a15c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When PCI bus is not enumerated, I/O memory and IRQ
numbers need to be statically initialized.
Change-Id: I4efcccd95d8048910f6c900c8daf46cbe3a5fa00
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Prevents unnecessary features from bloating the size of the galileo's
minimal footprint benchmark project.
Change-Id: Ie689a2c6fe1409904c43ec9a24a0efc01e768e4c
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The new flags parameter needs some documentation.
Change-Id: I24dc9df62323957bb4b294adf27487df3f76ea01
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
task_event_handler_set() only does event ID validation using __ASSERT(),
which cannot be easily tested automatically.
Change-Id: I060e3aa5b31f0a312e328e89db6f20cd800e9c5d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Event ID are not validated anymore against the maximum event number in
the system, since they are pointers now instead of low integers.
Validation can be useful, but only do it in a debug kernel, with no
penalty to a deployment system.
Change-Id: Ifd8dc8841892f6d19bbcb0c641a655fd0cb6ddb7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
since we are in the same directory, include the file directly.
Change-Id: I21c959538e4a3d9e3fba99eaa9b09697fffe25b0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
since we are in the same directory, include the file directly.
Change-Id: I8c676e1e5acd7dbab2c283d914a3ef62c2d36cdc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Standardizes appearance, corrects errors, improves readability,
and fills in gaps. Also streamlines descriptions for internal APIs
that don't require the same level of detail as public APIs.
Change-Id: Ic0f8149d14a8dab5e6df28b594c9b2e17f73e7b6
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Changing the ROM struct's interrupt_vector to reflect
what the value is properly referencing.
Change-Id: Ifb284821e82e01123c51a848d694da19e442c1e8
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Not supported in LLVM/clang. As it turns out,
this new implementation is 4 bytes shorter than its
predecessor.
Change-Id: I1f63b7a245dafcfc5a6dadc293875f00d02b997c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Was exposed when building with clang. No need for a second const.
Change-Id: Ie97f6a4756aff62ce969e3eb786593f2fc175a56
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fix a few spots where building with with clang fails.
Change-Id: I621c7cb8daf119bf89ad512168d70e1c9b67e53f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Clang support already existed in the Makefiles but was not complete
and some gcc options did not work with clang. Move those to be conditional
on the compiler used to make clang work.
To build with clang for x86:
make CC=clang -C samples/microkernel/apps/hello_world/
You still need the gcc cross environment for various tools.
For now, only x86 was tested.
Change-Id: Ic5aeab4f80d312e1d1312a4a9fc885a43f760270
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Due to a quirk of the k20 UART, when checking if either a Tx or Rx
irq is ready, one must first check whether the UART has enabled the
Tx and/or Rx interrupts. If this is not done, then all one is doing
is testing the UART to determine if it is ready to Tx and/or Rx.
Change-Id: I08a8280ed9fb0faef586f3c7d7befb3bfdec1e2d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This will be used to determine if controller supports
"LE Read Local P-256 Public Key" and LE Generate DH Key" commands.
Change-Id: Ib2bf7cfa99a20c07af0d3043ac9f9c2e0a6c2fcb
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
"LE Read Local P-256 Public Key" and LE Generate DH Key" commands
are used for LE Secure Connections pairing. "LE Set Event Mask"
is used to unmask events generated by those commands.
Change-Id: I601c8e21093ed2170dfe8e5618b34493268fe68d
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
This patch adds missing return call. Destroy was called early,
on read params. This could result in memory violation.
Another thing that has been fixed is assignment of bt_gatt_read
return value which can be negative to uint8_t type.
Change-Id: I1ddfea03038538efd70ad8ac68bd8df308a4ee3c
Signed-off-by: Mariusz Skamra <mariusz.skamra@tieto.com>
Net buf debug doesn't print even CONFIG_NET_BUF_DEBUG enabled.
Change-Id: Icbecc01b47010b7c3448fc3e8c07fd377842b15b
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
ip_buf_appdatalen should be user_data->expecting otherwise
it is zero.
Change-Id: Iedb61a7f0e3516a5643da04b5963a2e241fd8bc9
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
Change the init function name to have client string in it,
it is more logical that way.
Change-Id: Ie282151562620858dc78563f2a4e63f7fb4fc472
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
Instead of using IP bufs for sending stuff, allocate
a separate buffer that is only used in dtls sub-system
to send the encrypted buffer. This way there is no
possibility to deadlock in the dtls write callback
if we run out of buffers.
Change-Id: I45a909a50b6a9c83bb77712d47e968656b980d88
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Anas Nashif