Commit Graph

6 Commits

Author SHA1 Message Date
Andrew Boie aec607cc67 x86: remove memory mapping SOC code
This isn't needed any more, all of these directives were
for drivers which use device_map() now.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-07-17 11:38:18 +02:00
Andy Ross b3231ccd8a soc/x86/apollo_lake: IOAPIC ID's are not a SMP feature
This file consists only of an array of per-CPU IOAPIC ID's that
overrides the weak symbol defined by the architecture.

The IOAPIC IDs are only used when targetting a startup IPI for the
auxiliary right now, but the IDs are the IDs and represent hardware
truth.  They should be correct even if unused.

Using the wrong ones also breaks the tests/kernel/mp test, which calls
arch_start_cpu() when not in SMP mode as a deliberate unit test.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-05-19 19:19:51 +02:00
Charles E. Youse 3eb1a8b59a arch/x86: (Intel64) implement SMP support
Add duplicate per-CPU data structures (x86_cpuboot, tss, stacks, etc.)
for up to 4 total CPUs, add code in locore and z_arch_start_cpu().

The test board, qemu_x86_long, now defaults to 2 CPUs.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-10-07 19:46:55 -04:00
Charles E. Youse 239ceb4c5b soc/x86/apollo_lake: architecture is goldmont
Update the -march flag passed to the compiler to reflect the
underlying microarchitecture is 'goldmont'.

Fixes: #17104

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-15 11:33:47 +08:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Anas Nashif cff0005a87 x86: move soc/cpu to top-level under soc/
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00