This associates the SHELL UART backend with the DTS uart0. It solves
an issue with unresponsive shell.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
The fatal log now contains
- Trap type in human readable representation
- Integer registers visible to the program when trap was taken
- Special register values such as PC and PSR
- Backtrace with PC and SP
If CONFIG_EXTRA_EXCEPTION_INFO is enabled, then all the above is
logged. If not, only the special registers are logged.
The format is inspired by the GRMON debug monitor and TSIM simulator.
A quick guide on how to use the values is in fatal.c.
It now looks like this:
E: tt = 0x02, illegal_instruction
E:
E: INS LOCALS OUTS GLOBALS
E: 0: 00000000 f3900fc0 40007c50 00000000
E: 1: 00000000 40004bf0 40008d30 40008c00
E: 2: 00000000 40004bf4 40008000 00000003
E: 3: 40009158 00000000 40009000 00000002
E: 4: 40008fa8 40003c00 40008fa8 00000008
E: 5: 40009000 f3400fc0 00000000 00000080
E: 6: 4000a1f8 40000050 4000a190 00000000
E: 7: 40002308 00000000 40001fb8 000000c1
E:
E: psr: f30000c7 wim: 00000008 tbr: 40000020 y: 00000000
E: pc: 4000a1f4 npc: 4000a1f8
E:
E: pc sp
E: #0 4000a1f4 4000a190
E: #1 40002308 4000a1f8
E: #2 40003b24 4000a258
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Do not attempt to build/run all tests. Emulation platforms should
primarily build kernel and architecture related tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
GR716A microcontroller evaluation board with features an 80-pin
mezzanine connector. Also supports simulating with TSIM3.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This board configuration is compatible with
- GRLIB GPL FPGA template designs
- TSIM3 LEON3 eval
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This board configuration can be used out-of-the-box with SPARC QEMU
distributed with Zephyr SDK v0.11.2.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Martin Åberg