zephyr

Commit Graph

Author	SHA1	Message	Date
Yong Cong Sin	6a3cb93d88	arch: remove the use of `z_arch_esf_t` completely from internal Created `GEN_OFFSET_STRUCT` & `GEN_NAMED_OFFSET_STRUCT` that works for `struct`, and remove the use of `z_arch_esf_t` completely. Signed-off-by: Yong Cong Sin <ycsin@meta.com>	2024-06-04 14:02:51 -05:00
Antony Pavlov	0369998e61	arch: add MIPS architecture support MIPS (Microprocessor without Interlocked Pipelined Stages) is a instruction set architecture (ISA) developed by MIPS Computer Systems, now MIPS Technologies. This commit provides MIPS architecture support to Zephyr. It is compatible with the MIPS32 Release 1 specification. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>	2022-01-19 13:48:21 -05:00

Author

SHA1

Message

Date

Yong Cong Sin

6a3cb93d88

arch: remove the use of `z_arch_esf_t` completely from internal

Created `GEN_OFFSET_STRUCT` & `GEN_NAMED_OFFSET_STRUCT` that
works for `struct`, and remove the use of `z_arch_esf_t`
completely.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>

2024-06-04 14:02:51 -05:00

Antony Pavlov

0369998e61

arch: add MIPS architecture support

MIPS (Microprocessor without Interlocked Pipelined Stages) is a
instruction set architecture (ISA) developed by MIPS Computer
Systems, now MIPS Technologies.

This commit provides MIPS architecture support to Zephyr. It is
compatible with the MIPS32 Release 1 specification.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>

2022-01-19 13:48:21 -05:00

2 Commits