For true mmio-sram, arc,iccm, arc,dccm nodes we should not be setting
device_type = "memory". This should be used for true DRAM regions of
memory and not on SoC SRAMs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch nSIM from custom ARC UART to ns16550 model. That will
allow us to use zephyr images built for nSIM on other platforms
like HAPS, QEMU, etc...
This patch do:
* switch nSIM board to ns16550 UART usage
* change nSIM simulator configuration to use ns16550 UART model
* drop checks for CONFIG_UART_NSIM in ARC code
* update nSIM documentation
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Fix the following device tree warnings:
unit-address and first reg (0x40000) don't match for iccm@0
unit-address and first reg (0x80040000) don't match for dccm@80000000
Re-work iccm and dccm reg address and size to be based on #defines.
This allows the nsim_sem_normal.dts to override defaults that are set in
nsim.dtsi. Utilize DT_ADDR macro to take a 'unit-address' still value
and convert it into a hex value (just prepending 0x).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The "{d,i}ccm" nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are {d,i}ccm.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Instead of blind copy of nsim_em.dts re-structure this way:
* nsim.dtsi - Top-level "board" description re-usable for
| all nSIM-based "boards".
|
| Even though it's not needed right now but it
| allows to add other ARC core families in the future.
|
\_ nsim_em.dtsi - Common definitions for boards with ARC EM cores
|
\_ Real boards with ARC EM cores
|
\ nsim_em.dts
\ nsim_sem.dts
\ nsim_em_mpu_stack_guard.dts
\ nsim_sem_mpu_stack_guard.dts
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Kumar Gala