Commit Graph

300 Commits

Author SHA1 Message Date
Allan Stephens a3f3de3741 unified: Rename ESSENTIAL to K_ESSENTIAL
Adds standard prefix to symbolic option that flags a thread
as essential to system operation.

Change-Id: Ia904a81ce343fdd1cd44caaaeae641d822777f9b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-11-04 00:47:08 +00:00
Allan Stephens 743bdb8143 unified: Enable handling of thread options for static threads
Change-Id: I51d2d9cfa0eeb5f974a6cf1db32406399ef57418
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-10-27 08:36:14 -05:00
Allan Stephens 2220f25f0a kernel: Standardize thread monitoring initialization
Gets rid of unnecessary THREAD_MONITOR_INIT() macro, to be
consistent with the approach taken by _thread_monitor_exit().

Aligns x86 code with the approach used on other architectures.

Revises the associated comments and removes unnecessary
doxygen tags.

Change-Id: Ied1aebcd476afb82f61862b77264efb8a7dc66c9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-10-26 17:03:12 +00:00
Andrew Boie 26b1651f0c intstub.S: fix argument to _sys_power_save_idle_exit on IAMCU
Change-Id: I5aa1abe464ba2b8f9c36be78a95705ffcf993c7d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:27 +00:00
Andrew Boie 70d8a32740 x86: interrupts: consolidate duplicated code in idle path
Change-Id: I16b80f363fef17d3ea99fec0ced4f49238f8e6c7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:07 +00:00
Andrew Boie e56f61f5aa x86: exceptions: simplify exception stubs
Exception stubs now just push the handler and in some cases a dummy
error code before jumping to the exception handling code, never to
return.

Change-Id: I6a79d9243deb3fc7ccdae003dd0917364c0aa304
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:07 +00:00
Andrew Boie edeb1f1c52 x86: interrupts: optimize and simplify IRQ stubs
Interrupt stubs now just push the ISR and parameter onto the stack
and jump to the common interrupt code, never to return.

Change-Id: I82543d8148b5c7dfe116c43f41791f852614bb28
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:06 +00:00
Andrew Boie 2d7490c7ce x86: don't unconditionally run ISRs with interrupts enabled
Re-enabling interrupts before running the ISR must only be done
when CONFIG_NESTED_INTERRUPTS is turned on.

Change-Id: I2c04f2ce08d41cfef5553ee8554a90d1be0e86a3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-26 17:53:45 +00:00
Andrew Boie 99368c7435 x86: optimize GDT space
The CPU manual indicates that 8-byte alignment is sufficient,
not sure why gdt_rom was aligned on a 16-byte boundary.

The null descriptor in the GDT is never looked at by the CPU,
save a few bytes by putting the 6-byte pseudo descriptor there.

Change-Id: I73f26cdeb30a91f8258c88ef960a45812a11d959
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-20 20:47:15 +00:00
Andrew Boie 757dae5b7d x86: introduce new segmentation.h header
This header has a bunch of data structure definitions and macros useful
for manipulating segment descriptors on X86. The old IDT_ENTRY defintion
is removed in favor of the new 'struct segment_descriptor' which can be
used for all segment descriptor types and not just IRQ gates.

We also add some inline helper functions for examining segment registers,
descriptor tables, and doing far jumps/calls.

Change-Id: I640879073afa9765d2a214c3fb3c3305fef94b5e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-20 20:46:45 +00:00
Peter Mitsis 68d1f4b562 unified: Add timeslice support
Change-Id: I5b6c1ef5c015d1ddaea21b1c5447336b1b04db39
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-09-20 15:28:54 +00:00
Benjamin Walsh b32d0ff71e unified/x86: fix IAMCU build
Unified kernel does not provide the _thread_arg_t type, but instead uses
void * directly for its thread entry parameters. _thread_entry_t is
typedefed from void * anyway, and only obfuscates the type. So, define
_thread_entry_t to be a function pointer to a function with three void *
parameters, and when the unified kernel becomes the only kernel, all the
_thread_arg_t types will go away.

With this change, IAMCU runs all the tests sysV x86 is able to run as a
unified kernel.

Change-Id: I53c8754629a5a0a114a16a775ff1efc1884496ff
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-09-15 09:42:24 -04:00
Benjamin Walsh 983cbe398c unified/x86: add unified kernel support for x86 arch
The x86 architecture port is fitted with support for the unified kernel,
namely:

- the interrupt exit code now calls _Swap() if the current
  thread is not a coop thread and if the scheduler is not locked

- there is no 'task' fields in the _nanokernel anymore: _Swap()
  now calls _get_next_ready_thread instead

- the _nanokernel.fiber field is replaced by a more sophisticated
  ready_q, based on the microkernel's priority-bitmap-based one

- nano_private includes nano_internal.h from the unified directory

- the FIBER, TASK and PREEMPTIBLE flags do not exist anymore: the thread
  priority drives the behaviour

- the tcs uses a dlist for queuing in both ready and wait queues instead
  of a custom singly-linked list

- other new fields in the tcs include a schedule-lock count, a
  back-pointer to init data (when the task is static) and a pointer to
  swap data, needed when a thread pending on _Swap() must be passed more
  then just one value (e.g. k_stack_pop() needs an error code and data)

- fiberRtnValueSet() is aliased to _set_thread_return_value since it
  also operates on preempt threads now

- _set_thread_return_value_with_data() sets the swap_data field in
  addition to a return value from _Swap()

- convenience aliases are created for shorter names:

  - _current is defined as _nanokernel.current
  - _ready_q is defined as _nanokernel.ready_q

- _Swap() sets the threads's return code to -EAGAIN before swapping out
  to prevent timeouts to have to set it (solves hard issues in some
  kernel objects).

- Floating point support.

Note that, in _Swap(), the register holding the thread to be swapped in has
been changed from %ecx to %eax in both the legacy kernel and the unified kernel
to take advantage of the fact that the return value of _get_next_ready_thread()
is stored in %eax, and this avoids moving it to %ecx.

Work by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
         Allan Stephens <allan.stephens@windriver.com>
	 Benjamin Walsh <benjamin.walsh@windriver.com>

Change-Id: I4ce2bd47bcdc62034c669b5e889fc0f29480c43b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-09-13 17:12:55 -04:00
Benjamin Walsh b9a0d90a5f x86: load _nanokernel in %edi in _Swap()
Loading the _nanokernel address in %edi rather than in %eax allows
calling funtions in _Swap() without having to restore it, since %eax is
used for the return value. %edi is a callee-saved register and does not
have to be restored.

Change-Id: I338086d8e15857e835d5d7487de975791926f869
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-09-13 17:12:55 -04:00
Andrew Boie e931410756 x86: fatal: don't report bogus interrupt vectors
_irq_controller_isr_vector_get() now returns -1 if it couldn't
determine which vector was activated.

Issue: ZEP-602
Change-Id: Ib0f5dbc3b68cc5e2c3a23121530e178aede20d06
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-08 12:48:20 -07:00
Andrew Boie e98ac235e6 x86: declare internal API for interrupt controllers
Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.

Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.

Contents of the API:

- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.

- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags

- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced

- In assembly language domain, _irq_controller_eoi implements
EOI handling.

- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.

Specific changes made:

- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.

- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.

- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.

- Unused APIs removed, or folded into calling code when used just once.

- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway

Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-06 18:35:47 +00:00
Andrew Boie c545e19a00 x86: remove dynamic interrupts and exceptions
Change-Id: I7e9756e9a0735a7d8257ee2142d5759e883e12cc
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-06 18:35:24 +00:00
Andy Ross 9f628943a8 toolchain: Remove vestigial COFF assembler symbol mangling support
The toolchain headers included an abstraction for defining symbol
names in assembly context in the situation where we're using a
DOS-style assembler that automatically prepends an underscore to
symbol names.

We aren't.  Zephyr is an ELF platform.  None of our toolchains do
this.  Nothing sets the "TOOL_PREPENDS_UNDERSCORE" macro from within
the project, and it surely isn't an industry standard.  Yank it out.
Now we can write assembler labels in natural syntax, and a few other
things fall out to simplify too.

(NOTE: these headers contain assembly code and will fail checkpatch.
That is an expected false positive.)

Change-Id: Ic89e74422b52fe50b3b7306a0347d7a560259581
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2016-08-30 19:01:11 +00:00
Andrew Boie 0827d6c775 x86: fix incorrect printk() usage
Change-Id: I346a62f6a4611c7aaaae8b50dab17913faf4033f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-08-28 07:47:28 -04:00
David B. Kinder d748577706 doc: Fix terminology in Kconfig files for 'platform'
Completing the terminology change started with change 4008
by updating the Kconfig files processed to produce the
online documentation, plus header files processed by
doxygen.  References to 'platform' are change to 'board'

Change-Id: Id0ed3dc1439a0ea0a4bd19d4904889cf79bec33e
Jira: ZEP-534
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2016-08-18 21:17:29 +00:00
Andrew Boie 17c0b372a2 x86: improve exception APIs
Previously, exception stubs had to be declared in assembly
language files. Now we have two new APIs to regsiter exception
handlers at C toplevel:

 _EXCEPTION_CONNECT_CODE(handler, vector)
 _EXCEPTION_CONNECT_NOCODE(handler, vector)

For x86 exceptions that do and do not push error codes onto
the stack respectively.

In addition, it's now no longer necessary to #define around
exception registration. We now use .gnu.linkonce magic such that
the first _EXCEPTION_CONNECT_*() that the linker finds is used
for the specified vector. Applications are free to install their
own exception handlers which will take precedence over default
handlers such as installed by arch/x86/core/fatal.c

Some Makefiles have been adjusted so that the default exception
handlers in arch/x86/core/fatal.c are linked last. The code has
been tested that the right order of precedence is taken for
exceptions overridden in the floating point, gdb debug, or
application code. The asm SYS_NANO_CPU_EXC_CONNECT API has been
removed; it was ill- conceived as it only worked for exceptions
that didn't push error codes. All the asm NANO_CPU_EXC_CONNECT_*
APIs are gone as well in favor of the new _EXCEPTION_CONNNECT_*()
APIs.

CONFIG_EXCEPTION_DEBUG no longer needs to be disabled for test
cases that define their own exception handlers.

Issue: ZEP-203
Change-Id: I782e0143fba832d18cdf4daaa7e47820595fe041
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-28 18:13:24 +00:00
Andrew Boie eb53ebb885 x86: fix CONFIG_INIT_STACKS
The interrupt stack wasn't being initialized at boot.

Change-Id: Iec3e770d385643415641e15906c3a53f7c74a2e9
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-21 15:04:55 +00:00
Andrew Boie 0a86fcbb2a x86: assume irq stack pointer and size already aligned
This is now done in nano_init.c

Change-Id: I2717ca54fd5e16b18c2dc506bc3972caf23f26d8
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-21 14:26:30 +00:00
Andrew Boie fda08b0e43 x86: close EOI race condition when nested IRQs enabled
Until now, EOI had always been sent out to the APIC with interrupts
unlocked. Depending on timing, there is a race where the next interrupt
on the same line could arrive before _IntExit disables interrupts
and pops context. If this happens consecutively enough times, the
interrupt stack will overflow.

Now we disable interrupts at the beginning of _IntExitWithEoi and they
remain that way until 'iret'.

Change-Id: Ibb28e0db902ff483d7a885389f231ac2d1864657
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-20 21:48:00 +00:00
Andrew Boie 6a1474e75b nanokernel: support GCC compiler atomic builtins
Arches now select whether they want to use the GCC built-ins,
their own assembly implementation, or the generic C code.

At the moment, the SDK compilers only support builtins for ARM
and X86. ZEP-557 opened to investigate further.

Change-Id: I53e411b4967d87f737338379bd482bd653f19422
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-18 23:20:52 +00:00
Andre Guedes ebded004b9 x86: crt0: Remove 'je copyDataDone' from CONFIG_XIP block
When CONFIG_SYS_POWER_DEEP_SLEEP is enabled, the _sys_soc_resume
function is called and the 'ZF' bit from EFLAGS register may be set
to 1. In that case, we end up wrongly jumping into 'copyDataDone'
label and no data is copied from ROM to RAM.

It seems this 'je' instruction is used without any previous comparison
operation which properly sets the ZF flag. Since 'ZF' initial value is
0, we never jump into 'copyDataDone' label. Also, this 'je' instruction
doesn't seem to be really required since, if %ecx is zero, no data will
be copied anyway.

That being said, this patch removes the 'je' instruction since it fixes
the bug described in the first paragraph and it doesn't affect the rest
of the crt0 execution.

Also, removes outdated information about section size and alignment.

Change-Id: Ia062b78247c4059009193a53f879aa1ebe80881d
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-07-15 23:59:11 +00:00
Andrew Boie af085b8edf quark_se: make EOI operations atomic
Some issues have been noted with nested interrupts on quark SE.
In particular, the wrong vector # being sent to the IOAPIC EOI
register. Now when doing EOI, we lock interrupts so that the act
of reading the current vector being serviced, and sending EOI
to both controllers happens atomically.

Change-Id: Id9ad992740e197bb9d4638764952b04a27c4af61
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-13 22:41:33 +00:00
Andre Guedes 813923e63c x86: crt0: Fix '_sys_soc_resume' type declaration
The '_sys_soc_resume' symbol is function-type not data-type as declared
in crt0.S. This patch fixes this by using GTEXT macro instead.

Change-Id: Ibe8bcf92ab045bfe908fd2048d046083e773894f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-07-13 17:59:25 +00:00
Andrew Boie 8c524a291e x86: merge IAMCU and SYS V core arch code
Having two parallel implementations is a maintenance issue, especially
when some strategically placed #ifdefs will suffice.

We prefer the ASM versions for SYS V, as we need complete control of
the emitted assembly for interrupt handling and context switching.
The SYS V code is far more mature. IAMCU C code has known issues with
-fomit-frame-pointer.

The only difference between the two calling conventions is that the
first three function arguments are provided in eax, edx, ecx instead
of on the stack.

Issue: ZEP-49
Change-Id: I9245e4b0ffbeb6d890a4f08bc8a3a49faa6d8e7b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-13 17:56:39 +00:00
Andrew Boie 9557f0306c gen_idt: don't force 32-bit build
We no longer assume pointer sizes are the same between host and
target, and use stdint defintions to size things.

Change-Id: Ie4dc41c60d62931fdb3d1764ade01c16a64d0b54
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-08 20:31:02 +00:00
Andrew Boie 81f61bb1be x86: make GDT setup optional
For some security scenarios the GDT may already be setup and locked,
in which case the kernel trying to set it again could lead to problems.

Change-Id: I727c1d213479f46a4bb6f0c04a9096131e10b3e7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-26 19:32:03 +00:00
Kumar Gala 9ec2f3be80 Cleanup whitespace in Kconfig files
Convert leading whitespace into tabs in Kconfig files.  Also replaced
double spaces between config and <prompt>.

Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-25 13:28:07 -05:00
Peter Mitsis 1b3f8d1a95 x86 exceptions: Fix _ExcEntSetupDone
Fixes a bug in _ExcEntSetupDone wherein the return address to the
exception stub was accidentally changed to point to the TCS of the
interrupted thread.

Jira: ZEP-378
Change-Id: I0e502649c49c35ba8b2457016ede4a6b586da3fb
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-05-20 00:09:16 +00:00
Peter Mitsis b58878bb89 kernel: Init back pointer to microkernel task
Fibers initialize this back pointer to NULL as they are (by definition)
not microkernel tasks.  Microkernel tasks initialize it to their
corresponding 'ktask_t'.

However for nanokernel systems, the back pointer is always NULL. This
is because there is only one task in a nanokernel system (the background
task) and it can not pend on a nanokernel object--it must poll.

Change-Id: I9840fecc44224bef63d09d587d703720cf33ad57
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-05-04 22:51:33 +00:00
Andrew Boie 68b3b6135e errno: implement _get_errno() in common code
We really should have more faith in the compiler, it generates
code to implement this exactly like the arch-specific assembly
versions, and on ARM is actually 4 bytes shorter.

FUNC_NO_FP used to disable the usual C preamble to update the
frame/stack pointers, which is how the sizes are still the same
or less. It's debatable how useful the occasional use of
FUNC_NO_FP is in practice since it hinders debugging and in a
production build frame pointers should be globally disabled, but
we can address that later.

Change-Id: I6c4b64ab3e3a9b6f91d52fa8c92e6e79a986fc77
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-04 17:04:14 +00:00
Geoff Thorpe ded3070c1c nanokernel: tighten _is_thread_essential()
Of the 3 related functions;
  _thread_essential_set()
  _thread_essential_clear()
  _is_thread_essential()

The first two are parameter-less and always operate on
"_nanokernel.current". The last one takes a 'thread' parameter but will
operate on _nanokernel.current if the parameter is NULL. All calls to
_is_thread_essential() pass NULL!

This change makes the 3 functions consistent by removing the parameter
to the 3rd function. This should also be marginally more efficient,
though consistency was the motivation. This change corrects the doc
preamble to all 3 functions.

(These functions would probably be better as inlines. Also, the choice
of when to use wrappers seems a bit arbitrary. E.g. there's nothing
for setting/testing the "FIBER" flag.)

Change-Id: Ie3589f8a28b227c6d7a3a31b664d3b3e6e9c6d17
Signed-off-by: Geoff Thorpe <geoff.thorpe@nxp.com>
2016-05-03 17:42:54 +00:00
Juan Manuel Cruz 2170ca79ff build: support icx llvm compiler
Change-Id: I0bcc1f2e0ea93830e61fb3eaf8b523b7c4e1c301
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-05-03 00:02:40 +00:00
Benjamin Walsh 43592b1127 x86/debug: GDB server needs to handle some exceptions
GDB server needs ownership of some exceptions to display information when
taking a fatal exception (DIVIDE_ERROR, PAGE_FAULT).

Introduce a Kconfig option that can work for any debugger.

Change-Id: I39aef22a820543a7fe9ac333b487592946abc0f3
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:22 +00:00
Benjamin Walsh f703f7d0f6 debug: add target GDB server
The GDB server implements a set of GDB commands, such as read/write
memory, read/write registers, connect/detach, breakpoints, single-step,
continue. It is not OS-aware, and thus provides a 'system-level'
debugging environment, where the system stops when debugging (such as
handling a breakpoint or single-stepping).

It currently only works over a serial line, taking over the
uart_console. If target code prints over the console, the GDB server
intecepts them and does not send the characters directly over the serial
line, but rather wraps them in a packet handled by the GDB client.

Change-Id: Ic4b82e81b5a575831c01af7b476767234fbf74f7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:22 +00:00
Benjamin Walsh 270d602efd debug/x86: add runtime info needed by target debuggers
Introduce an x86 interrupt stack frame that contains more information
than the non-debug one, namely the caller-saved GPRs, as well as an API
to retrieve it. Able to handle nested interrupts stack frames.

Change-Id: If182aaa2f34e4714b16ca65ff79da63b72d962f7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:22 +00:00
Benjamin Walsh e83ddd1471 x86: add debug hook in _NanoFatalErrorHandler()
Allow a debug server such a GDB to take control when a fatal error
occurs. The debug server simply has to define a _debug_fatal_hook()
function that will override the weak function installed by default.

Change-Id: Ib9dca5755868f747b697fa3178e09109f1eedb07
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:21 +00:00
Andrew Boie c73a42bccc x86: irq: fix _get_dynamic_stub() calculation
It wasn't correct to add the size of the long jump instruction
as it *replaces* a short jump instead of just being after it.
So redefine this to be the difference in size between these
two instructions.

Change-Id: I65be2afab19d9cd8b096551acde0156f0503df87
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-03-30 22:24:16 +00:00
Ramesh Thomas bb19e6f82f power_mgmt: Make names consistent with new RFC
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.

Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-03-26 14:35:11 -04:00
Juan Manuel Cruz d151776e59 debug: thread monitor allow to access more thread information
The thread monitor allows to iterate over the thread context
structures for each existing thread (fiber/task) in the system.

Thread context structures do not expose thread entry information
directly. Although all the information can be scavenged from memory
stacks. Besides, accessing the information depends on the stack
implementation for each architecture.

By extending the tcs we allow a direct access to the thread
entry point and its parameters, only when thread monitor is
enabled.

It also allows a task to access its kernel task structure
through the first parameter of the thread.

This allows a debugger application to access the information directly
from the thread context structures list.

Change-Id: I0a435942b80eddffdf405016ac4056eb7aa1239c
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-03-11 22:11:39 +00:00
Andrew Boie 97594df321 iamcu: fix -fstack-protector
One of the tricks that GCC's stack protector does is to stick a
sentinel value on the stack at the beginning of the function, and
check if it is still there when the function is about to return.
However, since this function switches stacks that fails and we get
a stack protector exception before main() even starts.

Change-Id: I2acba8b8c822d7447d8e371bb72603f36e87f54b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-03-10 23:28:28 +00:00
Dmitriy Korovkin 287d16d83f x86: Fix cache flush code dependencies
Rearrange the source code in order to place functions
depending on clflush support detection into the proper
section.

Removed dependency between CACHE_LINE_SIZE_DETECT and
CLFLUSH_INSTRUCTION_SUPPORTED or CONFIG_CLFLUSH_DETECT.

Change-Id: I62ba5199763ed16c71f1d2fa372f6cc99b303e6a
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-03-07 20:25:22 +00:00
Andrew Boie e444825ee3 irq: formalize external zephyr interrupt API
The app-facing interface for configuring interrupts was never
formally defined, instead it was defined separately for each arch
in their respective arch-specific header files. Occasionally these
would go out of sync.

Now there is a single irq.h header which defines this interface.
To avoid runtime overhead, these map to _arch_* implementations of
each that must be defined in headers pulled in by arch/cpu.h.

Change-Id: I69afbeff31fd07f981b5b291f3c427296b00a4ef
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-26 15:53:22 +00:00
Benjamin Walsh fd1aa8575b x86: move reboot via RST_CNT from galileo to generic x86
That implementation is not galileo-specific, but rather a generic way of
rebooting an x86 target. Needs SoC support.

Change-Id: I9c3374a8ab57a624d9d9b7090260c5b11fe4e773
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-25 16:52:27 +00:00
Ramesh Thomas 3888735e0d adv_power:Advanced Power Management APIs
This is part of an ongoing development of power management
support in zephyr. This implementation builds upon an existing
hook interface and adds more enhancements. This was tested
with reference implementations on quark_d2000 and quark_se.

Change-Id: I28092b7ec90ce1f1cc661cf99ca88708910c8eb2
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-02-12 11:20:32 -08:00
Ramesh Thomas 72e248b11b adv_power:Rename PM functions according to coding convention
Renamed functions and labels used in power management code
according to coding convention.  Only doing this to relevant
functions and not touching functions that will be removed in
future patches.

The stack used during resume would be necessary so
renamed that too.

Change-Id: I2f09a349b0f0fd6520c11b4cd73f4c8e1a13f100
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-02-12 10:57:51 -08:00
Ramesh Thomas c1a2523445 adv_power:Fix build error when ADVANCED_IDLE flag is enabled
GlobalTss is not defined anywhere. This was originally designed
to be used by power management code to switch thread context to
kernel resume location. An alternative to this method would be
implemented.

Change-Id: I9ae14ba14f9573d8bd8579869cdee9cf85a5684a
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-02-12 10:57:51 -08:00
Sergio Rodriguez 4dee326306 tickless idle x86: Tickless idle support on nanokernel for x86
Modifications to timer drivers and interrupt setup, to manage
the tickless idle for the x86 architecture

Change-Id: Ie02d484b7e5636de6ea382ba2eeed57e704c8498
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
2016-02-11 19:10:24 +00:00
Andrew Boie f21ff23310 x86: add debug function to dump IDT
Looking at the IDT in a debugger is confusing, add a pretty-printing
function.

Change-Id: Iacc5e204e5d11e3e875c75ddf6d2e2e80b230299
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-10 16:02:17 +00:00
Andrew Boie 313ed31253 x86: fix IDT entry definition
It was, in a nutshell, wrong. Fortunately, the incorrectly
specified fields weren't being used by anything.

Change-Id: I0fa63fa16a267502744a7a2c82865c7de8b5446e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-10 16:01:26 +00:00
Andrew Boie b052bd282a x86: intconnect: convert some DEBUG to __ASSERT
DEBUG isn't tied to any config option. Just use assertions.
Most of the time return values aren't being checked anyway.

Change-Id: I7457dcf00e18505bd6bcd98d46288545c03b5fbc
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-08 21:45:07 -05:00
Andrew Boie 9fc3afc339 x86: rebase priority levels
Having priority levels 0 and 1 reserved on x86 due to implementation
details on how the CPU uses the vector table is confusing to users,
and makes it unnecessarily difficult to share drivers between arches.

Now on x86, priority levels 0 and 1 are available. Semantically, all
priority levels have had 2 subtracted from them.

It is no longer necessary to specify a priority level when the
vector itself is specified. If an IDT entry has a specific vector
associated with it, any priority argument is simply ignored.

In gen_idt, some simplifications have been made:
- The printed representation of a generated entry now fits on one line
- Some checks being done in validate_priority() were redundant, as
  generate_interrupt_vector_bitmap() also ensures that there are
  sufficient free vectors within a priority level.

Change-Id: I26669d8ee0a53f48fbc2283490a8c42d8b1daf8e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-08 21:45:07 -05:00
Andrew Boie 6e83effea8 iamcu: fix dynamic exceptions
The argument to _common_dynamic_exc_handler() in the C domain
was still being set up the Sys V way. Arguments are popped off the
stack in reverse order, so _ExcEnt pushes *pEsf for arg 2, and then
the stub pushes the stub_num for Arg 1.

For IAMCU case, *pEsf is placed in EAX which is where argument 1
lives; static exception handlers take just one argument. However
since we're calling _common_dynamic_exc_handler we also need to
supply the stub_id, which we put in EDX (where arg 2 goes).

Rather than swapping things around at runtime the prototype for
_common_dynamic_exc_handler() is adjusted to fit the calling
convention in use.

Change-Id: Id43cbc3b86d90f941cea771678b2796ae5f1358d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-08 21:45:07 -05:00
Juan Manuel Cruz 908cb87978 logger: support for iamcu abi core
Adds logger support to iamcu core for the following features:
- context switch logger
- interrupt logger
- sleep logger

Change-Id: Icfbd5fa787633045ba2895e8c28b652c55575b86
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:25:30 -05:00
Andrew Boie 5cc61d5406 iamcu: interrupts: fix comment
Was only true for SYSV version.

Change-Id: I2a73c027b4a68c879c66338713f2d50a400d6c26
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:29 -05:00
Andrew Boie fb0f918cb1 iamcu: fix dynamic IRQs
The common stub code didn't prefix the arg to 'mov' with a
'$', causing the assembler to generate code which tries to
dereference the argument before sticking it in EAX.

Change-Id: I0e201f799565d9709e3969b82ae2eb3f93a78b3a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:29 -05:00
Andrew Boie 0b1d68af27 iamcu: fix irq_offload()
The ASM stub invoked by irq_offload() wasn't switching to the
interrupt stack.

Change-Id: I0c52092a50396aa892e71f0501bbda38395d7554
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:29 -05:00
Andrew Boie f0a1d22f28 x86: leave the GDT in ROM by default
We don't normally need a runtime-mutable GDT; make it optional to
activate a second copy in RAM. Regardless of whether it is in RAM
or ROM, it can be accessed by the '_gdt' symbol.

Change-Id: I5ce955f4b8875eb60040917ceaacc07d7e5941ac
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:28 -05:00
Andrew Boie 897ffaeb2c irq: rename irq_connect() to IRQ_CONNECT()
It's not a function and requires all its arguments to be build-time
constants. Make this more obvious to the end user to ease confusion.

Change-Id: I64107cf4d9db9f0e853026ce78e477060570fe6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh a4ec963138 init: use SYS_INIT() where it makes sense
Mostly SoC initialization and some kernel subsystems, but also some
device drivers like the interrupt controllers.

Change-Id: I8dc1844c33acd877c075b6b03558fdca6f87500b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh d340d4cb3f device: use DEVICE_INIT everwhere
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().

Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh 0303d8cab9 device: rename SYS_DEFINE_DEVICE()
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.

Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Andrew Boie 2ee9aca31a irq: size _irq_to_interrupt_vector_table
Most systems have far less than 256 IRQ lines available, so
save some bytes in ROM by making this a config option.

On systems with MVIC, omit the table entirely as the mapping
is fixed.

The build cmd_gen_idt is slightly easier to read and will fail
immediately if any of the commands in the sequence error out.

Change-Id: I411f114557591e5cd96b618e6f79f97e8bedadf0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh bfc27206b2 device: rename DECLARE_DEVICE_INIT_CONFIG()
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.

Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Andrew Boie bd18487727 x86: if no dynamic irqs, omit _interrupt_vectors_allocated
This bitfield is only needed to find unused vectors in the IDT
for installing dynamic interrupts.

Change-Id: I34ecd330774a0e50f240b4396527682eded29627
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Andrew Boie 123c33a836 x86/iamcu: improve _execute_handler() readability, small optimization
It wasn't immediately clear in _execute_handler() that
enable_interrupts() didn't actually do anything if
CONFIG_NESTED_INTERRUPTS wasn't enabled.

If we are not using nested interrupts, perform small optimization
1) The call to disable interrupts isn't necessary as interrupts
are already disasbled
2) The check for !_nanokernel.nested in a couple places always
evaluates to true if nested interrupts aren't used

Change-Id: I7e66cee0466d03bc1172a572e19389accf6e0e62
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:22 -05:00
Andrew Boie af11f2aa4a x86: iamcu: fix implementation of disable_interrupts()
Change-Id: I3fe6ab5543f7e10113f9d5eb0fa81217135d5b74
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:17 -05:00
Andrew Boie d9cfbd5a61 interrupts: new static IRQ API
The interrupt API has been redesigned:

- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
  It will be used in situations where the new static irq_connect()
  won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
  exactly the same way as its dynamic counterpart. The old static irq
  macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
  generated inline with irq_connect()

ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.

Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:17 -05:00
Andrew Boie 89ec552be9 x86: iamcu: fix exception NANO_ESF parameter
On SysV ABI, the NANO_ESF parameter is passed in via the stack.
For IAMCU, this is instead expected to be in EAX.

_ExcEnter is currently using EAX to stash the return address of
the calling stub while it does a stack switch. Change it to use ECX
for this purpose, and if we are running with IAMCU place the
parameter in EAX instead of pushing it.

The output of the fault handler has been cleaned up a bit and it
now also includes the code segment.

Change-Id: I466e3990a26a1a82dd486f3d8af5395eab60b049
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:16 -05:00
Andrew Boie 7cb5276158 x86: remove NANO_SOFT_IRQ from zephyr
This was never implemented on ARC/ARM and has been superseded
by irq_offload().

Some checks that were only done with CONFIG_LOAPIC_DEBUG fall
under the category of 'shouldn't ever happen' and have been
converted into assertions, instead of propagating return values
which are largely never checked.

Change-Id: I4eedca05bb7b384c4f3aa41a4f037f221f4a9cfe
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:16 -05:00
Peter Mitsis 5c01c09f4d nano_stack: Simplify nano_xxx_stack_pop() API family
Changes the nanokernel stack API so that the timeout parameter must be
specified when invoking nano_isr_stack_pop(), nano_fiber_stack_pop(),
nano_task_stack_pop() and nano_stack_pop().

This obsoletes the following APIs:
	nano_fiber_stack_pop_wait()
	nano_task_stack_pop_wait()
	nano_stack_pop_wait()

Note that even though the new API requires that the timeout parameter
be specified, there are currently only two acceptable values:
	TICKS_NONE and TICKS_UNLIMITED
This nanokernel option does not support CONFIG_NANO_TIMEOUTS.

Change-Id: Ic7f16ee30c3534115ceffa19ef8591ecc5a79080
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:14 -05:00
Peter Mitsis f0b55aa624 nano_lifo: Simplify nano_xxx_lifo_get() API family
Changes the nanokernel LIFO API so that the timeout parameter must be
specified when invoking nano_isr_lifo_get(), nano_fiber_lifo_get(),
nano_task_lifo_get() and nano_lifo_get().

This obsoletes the following APIs:
	nano_fiber_lifo_get_wait()
	nano_fiber_lifo_get_wait_timeout()
	nano_task_lifo_get_wait()
	nano_task_lifo_get_wait_timeout()
	nano_lifo_get_wait()
	nano_lifo_get_wait_timeout()

Change-Id: Ie9f93e46da42ea33c32544c02ab1d70b893cc198
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:14 -05:00
Peter Mitsis 54b782a88b nano_sema: Simplify nano_xxx_sem_take() API family
Changes the nanokernel semaphore API so that the timeout parameter must be
specified when invoking nano_isr_sem_take(), nano_fiber_sem_take(),
nano_task_sem_take() and nano_sem_take().

This obsoletes the following APIs:
	nano_fiber_sem_take_wait()
	nano_fiber_sem_take_wait_timeout()
	nano_task_sem_take_wait()
	nano_task_sem_take_wait_timeout()
	nano_sem_take_wait()
	nano_sem_take_wait_timeout()

Change-Id: If7a4bce1bd8ec8d6410d04f3c16ff1922ff0910e
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:14 -05:00
Peter Mitsis cd6db374de nano_fifo: Simplify nano_xxx_fifo_get() API family
Changes the nanokernel FIFO API so that the timeout parameter must be
specified when invoking nano_isr_fifo_get(), nano_fiber_fifo_get(),
nano_task_fifo_get() and nano_fifo_get().

This obsoletes the following APIs:
	nano_fiber_fifo_get_wait()
	nano_fiber_fifo_get_wait_timeout()
	nano_task_fifo_get_wait()
	nano_task_fifo_get_wait_timeout()
	nano_fifo_get_wait()
	nano_fifo_get_wait_timeout()

Change-Id: Icbd2909292f1ced0bad8a70a075478536a141ef2
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:14 -05:00
Andrew Boie 689ec02211 x86: mvic: fix IDT reload
The argument to 'lidt' is a chunk of memory with the base address
and limit of the IDT, and not the IDT itself. Horrible things
were happening when the IDT itself was being passed to this
instruction.

To be extra safe, disable interrupts while we modify the table
and subsequently reload it.

Change-Id: I9bf96f13a5f6e1be80d11bbfb9db3df1f2ed613a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:06 -05:00
Dirk Brandewie d8a1c8ef17 x86: iamcu: Add support for the IAMCU calling convention.
Add support for compilers conforming to the IAMCU calling convention
as documented by
https://github.com/hjl-tools/x86-psABI/wiki/iamcu-psABI-0.7.pdf


Change-Id: I6fd9d5bede0538b2049772e3850a5940c5dd911e
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:06 -05:00
Andrew Boie a664aae335 x86: reduce static IRQ stub size
All of these stubs at the end pop the stack and tell the LOAPIC
that we are at EOI. Put this in common code which falls through to
_IntExit(). Saves 8 bytes per static IRQ stub. There is also small
constant savings in the common code for dynamic IRQs.

Change-Id: If17e9f105928a4251a2cb3fc0d192649c1c4d84b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:05 -05:00
Andrew Boie 407d9e050b x86: irq_offload: don't use the last vector
The APIC by default uses vector 0xFF for the spurious interrupt
vector as described in the x86 CPU manual volume 3 section 10.9.
Make this its own config option defaulting to 32.

MVIC doesn't have a spurious interrupt vector, and due to the
fixed IRQ-to-vector mapping for this controller, continue
to use the last available entry.

Change-Id: I29bd09df700629dc0d15b30a6ae590b0df1ef890
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie a0e427f8a4 x86: remove loapic_int_vec_trigger()
This was only needed for an older implementation of software interrupts,
now superseded by the irq_offload() API (which doesn't interact with
the interrupt controller at all)

Change-Id: I8aa696d370ae1799872f6d70de69f3cb5b47456a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Dirk Brandewie fa2441534a x86: kernel move excstub.S back to core
excecptions are handled the same for i386_sysV_abi and iamcu calling
conventions ATM since we do not have any exceptions that we can
recover from there is no reason to have seperate implementations.

Change-Id: Ica8b332d7756a91b56f7080ac74771ad25d32753
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:04 -05:00
Dirk Brandewie 88ce5bc8f5 kernel: remove CONFIG_INT_LATENCY_BENCHMARK fences from code path
Add null definitions for the interrupt latency measurement API so we
can remove compile fences in C code.

Change-Id: If86eedf79afcb49002108814dd4fb864956eb667
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie a50f923504 x86: fatal: report vector number of spurious interrupts
Change-Id: I79de1a77d2b5f87aa3bd1a7aebd0253dbb069252
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:04 -05:00
Andrew Boie 7770c3ed9d x86: mvic: re-load IDT if it is modified
According to the datasheet, there is some caching going on as a 
performance optimization and the IDT needs to be re-loaded if any
changes are made at runtime.

Change-Id: I23864e1109907512066a9f8f3a36e3f719b9174b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:03 -05:00
Benjamin Walsh 3181df6db4 kernel: add per-thread errno support
Saves an errno per-thread, retrieved via _get_errno(), instead of
changing the value of a global variable during context switches to avoid
a hit to the context switch performance.

Per-arch asm implementations are provided for maximum performance.

Enabled by default, but can be disabled via the CONFIG_ERRNO option.

Change-Id: I81d57a2e318c94c68eee913ae0d4ca3a3609c7a4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:58 -05:00
Anas Nashif 275ca60b08 Fixed file description and applied doxygen style
Removed old style file description and documnetation and apply
doxygen synatx.

Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:58 -05:00
Yonattan Louise 8885d093c4 Add support for profiling sleep events in nanokernel.
This patch remove the dependency of the ADVANCE_POWER_MANAGEMENT
for profiling sleep events that was supported only for microkernel.
Allowing us to also use this feature in nanokernel-only systems.

Change-Id: I1761eb6c4d72f477b419dfca5dc152b0fb69ee27
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
2016-02-05 20:24:58 -05:00
Andrew Boie 4d7181b762 x86: move intconnect.c
Although it contains functions called from ASM-land, there's no
calling-convention specific code here.

Change-Id: I3d912bdf28e6f3e797e6a2d6b745302b4c884b4a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:57 -05:00
Daniel Leung 5cdd4584fe uart_pipe: use device name instead of index
Use device name to find the UART device for uart_pipe usage,
instead of relying on an arbitrary index.

Change-Id: I36aaa4ed8f0b4905e4e741ca1464947e59f30869
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 1720991b81 bluetooth/uart: use device name instead of index
Use device name to find the UART device for Bluetooth usage,
instead of relying on an arbitrary index.

The default device names being used are derived from the original
board.h for each platform. Some of them point to the same device
as UART console. Since this is a Kconfig option, the default
can be overridden so this is not a serious issue.

Change-Id: Ibe82f3968e72ba60f9c033aa3dfcb2fb3c41dc75
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Daniel Leung 08b4fd431b console/uart: use device name instead of index
Use device name to find the UART device for console usage, instead of
relying on an arbitrary index.

Change-Id: Iebe01c9bf392dfee6d8284367f67647f7d47561a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-02-05 20:24:56 -05:00
Anas Nashif 62ca32d692 kconfig: reorganise kconfig for x86
Group options and remove redundant menus.

Change-Id: I8d5297f850aeada5c5b14cfb7a206ce07493e116
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:55 -05:00
Andrew Boie bba9510319 irq_offload: API to run a function in IRQ context
Software interrupts or system calls aren't really appropriate for
zephyr, but we have an ongoing need in our test code to run a
function with arguments synchronously in interrupt context.

This patch introduces irq_offload() which allows us to do this without
separate initialization or having to manage fake IRQs in the
interrupt controller.

ARM assembly code contributed by Benjamin Walsh
<benjamin.walsh@windriver.com>

ARC is not yet implemented but will be in a subsequent patch.

irq_test_common.h has been removed and all test cases updated to
use the new API.

Change-Id: I9af99ed31b62bc7eb340e32cf65e3d11354d1ec7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:55 -05:00
Dmitriy Korovkin 57f2741e4f init: Implement fine-grained initialization policy
Put initialization priorities as device driver Kconfig
parameter.

Initialization priority value for each platform is defined
in the platform Kconfig file.

Drivers and platform code use SYS_DEFINE_DEVICE to add
and initialization function.

Change-Id: I2f4f3c7370dac02408a1b50a0a1bade8b427a282
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:54 -05:00
Benjamin Walsh ba31ab92a3 x86: refactor assembly flags in Makefiles
Add comment regarding the use of GAS when using clang, and remove
duplication of setting -Wa,--divide, which is needed for all toolchains.

Change-Id: Iab7257b038d1f4142c37a6c6c5979ef28f78a655
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:53 -05:00
Benjamin Walsh 4c57acb883 x86: split ABI related files
Move the files that *know* about the calling convention in use by the
compiler. The routines exposed by the files moved to the i386_sysV_abi
directory follow the C calling convention specified by the
i386_sysV_abi which is the default for GCC. The upstream GCC has been
enhanced to support the iamcu_ABI that is optimized for processors
that implement the IA MCU instruction set. This new ABI provides code,
data and stack size improvements on IA MCU based systems.

This change is the first step in adding support for the IA MCU
optimized toolchains to Zephyr OS

Change-Id: I13bffee8007fb3f82aa31389b2c241065e8e315d
Original-work-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:53 -05:00
Szymon Janc c0baad2262 Rename simple UART driver to pipe UART
Original name was too generic and confusing. This patch renames
driver to pipe UART and moves it to console drivers folder. Kconfig
destription is also improved.

Change-Id: I716fdbf7d636bbdc03b0fce27a59fd866f473246
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
2016-02-05 20:24:52 -05:00