Commit Graph

11 Commits

Author SHA1 Message Date
Anas Nashif f7dac85d15 drivers: i2c: move to new logger
Move to new logger subsystem.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Yannis Damigos 7b0632822b drivers: i2c_ll_stm32_v1: Handle NACK during address tranmsission
In polling mode, if a NACK is received during address transmission
the driver waits forever the ADDR flag. We need to check AF flag
and stop the transmission if it is set.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-27 12:52:53 -04:00
Yannis Damigos 32d159e335 drivers: i2c_ll_stm32_v1: Generate STOP condition if NACK
Acknowledge failure (AF) error occurs when the interface detects
a NACK bit. According to the reference manual, the transmitter
which receives a NACK must reset the communication:
– If Slave: lines are released by hardware
– If Master: a Stop or repeated Start condition must be generated
  by software

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-27 12:52:53 -04:00
Manivannan Sadhasivam 2b0821cce7 drivers: i2c: stm32f4: Fix incorrect buffer assignment
Wrong buffer assigned for receiving the last 2 bytes in multi
byte reception of STM32F4 i2c driver. Change the buffer to
correct one.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-01-13 11:36:15 -08:00
Manivannan Sadhasivam 1bd48edd26 drivers: i2c: stm32f4: Add check for BTF flag before reading N-2 byte
According to STM32F4 reference manual, software should wait for BTF=1
before reading N-2 data byte.

Reference:

"For N >2 -byte reception, from N-2 data reception" section, page
853 of STM32F4 Reference manual.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2018-01-12 09:33:27 -06:00
Yannis Damigos b80da2b710 drivers: i2c_ll_stm32: Use I2C API flags
STM32 I2C driver doesn't use the I2C API flags STOP/RESTART,
instead it uses its own RESTART flag. As a result, I2C API's
i2c_burst_write* funtions doesn't work. This patch makes
STM32 I2C driver to use I2C API flags.

Tested on: 96b_carbon, olimexino_stm32 (i2c_ll_stm32_v1)
Tested on: stm32f3_disco, disco_l475_iot1 (i2c_ll_stm32_v2)

Fixes: #4459

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2017-11-15 09:09:58 -06:00
Kumar Gala 83643a2266 drivers: i2c: remove usage of bitfield access for cfg
Cleanup I2C drivers to not use bitfield access for config information
and instead use accessor macros that use shifts & masks.  This is
cleanup towards removing the bitfield access in the future.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-09-20 10:16:14 -05:00
Yannis Damigos 22912ffcf9 drivers: i2c_ll_stm32_v1: Fix RX for all receptions
This patch fixes the read operation of the I2C driver
for all the receptions (1-byte, 2-bytes, N-bytes when
N > 2)

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Martin Iñaki Malerba <inakimmalerba@gmail.com>
2017-08-10 12:45:44 -05:00
Yannis Damigos 9a9f65fd0c drivers: i2c_ll_stm32_v1: Fix TX if flag I2C_MSG_RESTART is set
In interrupt mode, the drivers entered a forever loop if the
I2C_MSG_RESTART flag was set. This patch fix this issue.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-08-10 12:45:44 -05:00
Yannis Damigos 654b3381aa drivers: i2c_ll_stm32_v1: Disable/enable only Buffer interrupts
The EVENT interrupt is generated when:
– SB = 1
– ADDR = 1
– ADD10= 1
– BTF = 1 with no TxE or RxNE event
– TxE event to 1 if Buffer interrupt enabled
– RxNE event to 1 if Buffer interrupt enabled

We need to disable and enable the Buffer TxE and RxNE interrupt
inside the EVENT ISR. The LL_I2C_{Enable,Disable}IT_TX and
LL_I2C_{Enable,Disable}IT_RX functions, used now, enable and
disable both Buffer and Event interrupt. This patch uses the
LL_I2C_EnableIT_BUF and  LL_I2C_DisableIT_BUF functions to
enable and disable the Buffer interrupt (TxE, RxNE).

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-08-10 12:45:44 -05:00
Jorge Ramirez-Ortiz 21fbc9b07e drivers: i2c: stm32 LL F1/F4 (v1) STM32 F3/L4X (v2)
Supports STM32 F1/F4 (v1 controller) and STM32 F3/L4X (v2
controller)

v1 could also support L1X.
v2 could also support F7X.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Reviewed-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-07-01 08:36:51 -04:00