Commit Graph

564 Commits

Author SHA1 Message Date
Anas Nashif b3ae274a62 tests: fix PCI test using 'supported' keyword
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-28 09:51:40 -05:00
David B. Kinder abcb8d446e doc: fix sidebar nav issues with board docs
Sidebar navigation for supported boards is wonky: opens to show
all boards (making for lots of scrolling to see the sidebar) and
sidebar items aren't always clickable (as explained in the JIRA
issue).

Fix is to not use multiple toctree directives in boards.rst and
create intermediate architecture-specific supported board docs.

JIRA: INF-132

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-27 19:21:29 -04:00
Kumar Gala d426d122f1 boards; cc2650_sensortag: Get building with sanitycheck
Board port was done before the yaml transition, so was missing a
cc2650_sensortag.yaml.  As such when we build all the test we get a few
build errors that we also fixed up.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-23 15:05:10 -05:00
David B. Kinder 7f5d88ce5f doc: fix doc errors in stm32_min_dev.rst (take 2)
misspelled link name and incorrectly formatted tables
caused doc build errors  (PR #565 lost)

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-23 15:05:10 -05:00
Siddharth Chandrasekaran f7705af136 boards: arm: Add support for STM32 Minimum Development Board
Add configuration, documentation, pinmux, fixup and dts support for
STM32F103x8 based Minimum System Development board.

Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2017-06-23 15:05:10 -05:00
Michel Jaouen d9c314a8a6 boards: disco_l475_iot1: enable MPU
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
2017-06-23 15:05:10 -05:00
Michel Jaouen e00b2be6a5 boards: nucleo_l476rg: enable MPU
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
2017-06-23 15:05:10 -05:00
Piotr Mienkowski 85d86f6e0d boards: sam_e70_xplained: allow flashing via JTAG header
Allow to use an external debug adapter such as J-Link or ULINK
connected to a 20-pin JTAG header to flash the image. SWD is
the actual protocol used by the debug interface.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-06-23 15:05:10 -05:00
Kumar Gala bced2e8a63 board: frdm_k64f: allow overriding default debug/flash scripts
As there are multiple ways to flash or debug (pyOCD or openOCD) allow
the user to override the default.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-23 15:05:10 -05:00
Kumar Gala 404ceb6d1e boards: 96b_nitrogen: Add support for flash/debug with pyOCD
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-23 15:05:10 -05:00
Savinay Dharmappa ba034a8b77 dts: arduino101: Add device tree support for arduino101 board
patch adds necessary files and does the modification
to the existing files to add device support for
arduino_101 board.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-06-22 10:23:39 -05:00
Anas Nashif 458d217398 update: board names
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-21 20:56:53 -04:00
Anas Nashif 295897c191 boards: add board meta-data
Add board metadata to be consumed by the sanitycheck script to provide
better matching with testcases and to test based on features declated in
the board files.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-21 20:56:53 -04:00
Leandro Pereira c78f55d0af boards: esp32: Do not use undefined CONFIG_BOARD_XTENSA
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 18:09:13 -04:00
Leandro Pereira f0b4e174d7 esp32: Use esptool.py to flash with 'make flash'
This flashes Zephyr at 0x1000: that's where the first stage bootloader,
part of the ESP32 ROM, expects to find an "image header".

The second-stage bootloader, part of ESP-IDF, isn't used by the Zephyr
port.  However, the bootloader can be used if desired; please refer to
the ESP-IDF documentation on how to set up partitions tables and use
the bootloader.

The following environment variables will affect the ESP32 flashing
process:

  Variable              Default value
  ESP_DEVICE            /dev/ttyUSB0
  ESP_BAUD_RATE         921600
  ESP_FLASH_SIZE        detect
  ESP_FLASH_FREQ        40m
  ESP_FLASH_MODE        dio
  ESP_TOOL              espidf

It's impossible to determine which serial port the ESP32 board is
connected to, as it uses a generic RS232-USB converter.  The default of
/dev/ttyUSB0 is provided as that's often the assigned name on a Linux
machine without any other such converters.

The baud rate of 921600bps is recommended.  If experiencing issues when
flashing, try halving the value a few times (460800, 230400, 115200,
etc).  It might be necessary to change the flash frequency or the flash
mode; please refer to the esptool documentation for guidance on these
settings.

If ${ESP_TOOL} is set to "espidf", the esptool.py script found within
ESP-IDF will be used.  Otherwise, this variable is handled as a path to
the tool.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
Leandro Pereira 0e08b946de soc: esp32: Define __start as a C function
The first stage bootloader, part of the ESP32 ROM, already sets up
a stack that's sufficient to execute C programs.  So, instead of
implementing __stack() in assembly, do it in C to simplify things
slightly.

This ESP32-specific initialization will perform the following:

  - Disable the watchdog timer that's enabled by the bootloader
  - Move exception handlers to IRAM
  - Disable normal interrupts
  - Disable the second CPU
  - Zero out the BSS segment

Things that might be performed in the future include setting up the
CPU frequency, memory protection regions, and enabling the flash
cache.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
Leandro Pereira 4ca586e62d arch: xtensa: Use Zephyr configuration options
Unconditionally use CONFIG_SIMULATOR_XTENSA to determine if XT_SIMULATOR
or XT_BOARD should be defined.

If CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, also define XT_CLOCK_FREQ.  This
isn't ideal as the clock frequency might be changed in runtime and this
effectively makes it a constant.

Until we can control the clock frequency in runtime, this will suffice.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
Leandro Pereira 37ea77173c drivers: esp32: Add minimal UART driver based on ROM routines
This is a minimal driver enabling console output during the port
bringup.  While the driver works, only one of the three UART devices
are supported, and there isn't any way to change any parameters or
use interrupts.  This will most likely be superceded by a proper
driver after the port has matured.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
Leandro Pereira c13174935b boards: xtensa: Add ESP32 board
This is based on the work of Rajavardhan Gundi.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
David B. Kinder fffb5d9c90 eoc: move non-board docs from boards TOC list
A couple of docs were created in previous PRs with board support
information common to a few boards.  Move these to a new section
for "Board Support Tools".  (I debated about hiding them completely
but decided it would still be useful to have these tool docs appear
in the table of contents, just not embedded with the supported boards
docs.)

Moved these board tools docs over to the doc/ folder and out of
boards/ and removed these pages from the navigation index.

JIRA: ZEP-2285

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-17 07:07:28 -04:00
Geoffrey Le Gourriérec 0abeba8b1a sensortag: Add TI's SensorTag board.
Add support for TI's SensorTag board, which uses a CC2650 SoC.

Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
2017-06-16 16:18:12 -04:00
David B. Kinder cbec29ab95 doc: change UTF-8 chars to sphinx inline replaces
Avoiding use of UTF-8 characters (trip up some tools)

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-16 07:35:11 -05:00
Erwin Rol 0c4ba8f7d2 boards: arm: olimex_stm32_e407: Initial Olimex STM32-E407 BSP
- board name olimex_stm32_e407
- CPU STM32F407ZGT6 Cortex M4
- LED/BUTTON support
- Console on USART1 with 8n1 115200 baud

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-06-15 15:07:46 -05:00
Kumar Gala 0b5e63da30 boards: stm32373c_eval: fix trailing whitespace in docs
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-15 10:13:21 -05:00
Adam Podogrocki 74773a4af1 boards: provide STM32373C-EVAL development board's documentation
JIRA: ZEP-1917

Change-Id: I5a0522b3b0f8d9b3215773e4f5ca513003ca69e4
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-06-15 08:22:48 -05:00
Adam Podogrocki 52ec883ae4 boards: provide STM3210C-EVAL development board's documentation
JIRA: ZEP-1911

Change-Id: I90069499392f5016ce3bc9510962d240bc36dc69
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-06-15 08:22:48 -05:00
Adam Podogrocki cd47d35695 boards: provide Nucleo-64 F334R8 development board's documentation
JIRA: ZEP-1902

Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-06-15 08:22:48 -05:00
David B. Kinder d1bdb3e092 doc: fix board/sample broken links
Some files have moved from their original location, or are no longer
available.  For the mbedtls samples, tweak the link to point to a page
where links for current and previous downloads can be found.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-13 20:49:13 -04:00
David B. Kinder 9faa5f2033 doc: spelling fixes in Kconfig files
regular spelling check on Kconfig.* files

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-12 19:40:51 -04:00
David B. Kinder 342bdda760 doc: spelling fixes in samples/ and boards/
regular spelling check on .rst files

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-12 18:28:08 -04:00
David B. Kinder 0eb078b737 doc: fix reference to nios2-configure-sof tool
Board documentaion for altera_max10 referenced the nios2-configure-sof
tool in arch/nios2/soc/nios2f-zephyr/cpu/ when this tool is actually
part of the Altera Quartus SDK (the .sof FPGA configuration files are
in this folder)

jira: ZEP-2006

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-09 18:49:32 -04:00
Adithya Baglody 7211665f99 pinmux: Galileo: Updated the pinmux to use new PWM API's.
JIRA: ZEP-2139

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-06-09 08:20:59 -04:00
Andrew Boie ef2e463493 frdm_k64f: default to pyocd.sh for flashing/debug
The wiki directions indicate that this script should be used,
and openocd.sh doesn't even work. Switch to pyocd.sh by default.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 13:49:36 -05:00
fallrisk 106bf1c09a arm: board: Add support for board Atmel SAM4S Xplained.
This commit provides support for Atmel SAM4S Xplained board

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-06-02 14:11:13 -04:00
Florian Vaussard 13cba0bb76 stm32f4: Add STM32F412 Nucleo board
Add necessary board files, pinmux and device tree in order to have a
usable debug console.

Origin: Original

Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00
Erwan Gouriou 9413c8ba4d stm32: clean up after completion of transition to ll Clock control
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Erwan Gouriou a7536a12e4 boards: move stm32f1xx based boards to LL based Clock control driver
Following introduction of stm32cube LL based clock control driver
for stm32f1 series, update stm32f1xx based boards to support new
driver settings

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Florian Vaussard 7e6184a1c3 nucleo_f413zh: Enable MPU
Enable the MPU on the Nucleo STM32F413 board.

Change-Id: I0f256a4c7231f9d3844e67a94d989c8d93b60e58
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00
Florian Vaussard 8aea7d5144 nucleo_f413zh: Remove imaginary config from defconfig
CONFIG_CLOCK_VDD_VOLTAGE does not exist. It was introduced by accident
with commit 614db02cc6 ("stm32f4: Add STM32F413 Nucleo board"), so
remove it!

Change-Id: I3363a92627708bf5ffb080c2238fc84c71caa8d9
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00
Piotr Mienkowski dffc06ddd2 drivers: serial: deprecate usage of atmel_sam3 driver
Atmel SAM3X series has been recently converted to use ASF
and should now use common SAM family drivers. The atmel_sam3
serial driver will be removed in the future.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-06-02 14:11:13 -04:00
Justin Watson 010c8b0686 boards: arm: Added doc. image for the SAM E70 Xplained.
Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-06-02 14:11:13 -04:00
Justin Watson 489c7bd449 boards: arm: arduino_due: Added doc. image for the Arduino Due.
Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-06-02 14:11:13 -04:00
Andrew Boie 5b4867b05b bbc_microbit: fix 'make debugserver'
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-02 02:17:32 -04:00
Anas Nashif 70b2a57d7a quark_d2000_crb: increase default stack size
Increase to 1024 to get more tests and sample running on this device
with only 8K of SRAM.

Change thread stack size in the mslab test to make it fit into this
board.

Jira: ZEP-2079
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-01 10:27:34 -04:00
Anas Nashif 5472fbf7f7 doc: remove links to wiki
Wiki is being obsoleted, so remove any links that might become dead
really soon.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 14:54:34 -04:00
Michael Scott b4b3e56a09 arm: soc: nordic nRF52: Add MPU support
We now have generic ARM M4 MPU support added to Zephyr.
Let's enable it for use with Nordic nRF52 chips.

Memory Layout was generated from Section 8.3 "Memory
Map" of nRF52 Product Specifications (for both nRF52832
and nRF52840):
0x00000000: Flash
0x10000000: Factory Information Config Registers
0x10001000: User Information Config Registers
0x20000000: SRAM
0x40000000: APB Peripherals
0x50000000: AHB Peripherals
0xE0000000: ARM M4 Private Peripheral Registers

NOT Configured:
0x60000000: External RAM
0x80000000: External RAM
0xA0000000: External Device
0xC0000000: External Device

NOTE: More work will be needed for future Nordic MWU (Memory
Watching Unit) support.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-05-28 09:18:54 -05:00
Johan Hedberg 9516d63836 Bluetooth: Remove support for NBLE
NBLE has been deprecated for a few releases now and can be removed.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-05-25 09:03:16 -07:00
Anas Nashif 777b52efe3 boards: microbit: enable flashing with pyocd
Flash the BBC Micro:Bit with pyocd, just run:

make BOARD=bbc_microbit flash

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-21 23:24:17 -04:00
Anas Nashif 5fc80dce61 xtensa: dont set variant with gcc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-20 07:04:33 -04:00
Piotr Mienkowski 77a88da4fc arch: same70: hide soc.h defines from assembler
Neither ASF nor CMSIS provide defines that can be processed by
the assembler. Exclude those from soc.h. Before this was done
incorrectly in board.h file.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-05-19 10:06:48 -04:00