Every architecture must export the z_irq_spurious definition. Just unify
that in one single header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
change the test interrupt line number to a bigger one, because
the low number usually will be used by other devices.
Signed-off-by: Chen Peng1 <peng1.chen@intel.com>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
There's no reason to wait a whole second here just to know if a tick
should have fired (though, yes, on some older/legacy/non-tickless
configurations, 128 ticks is actually more than a second).
Some simulators are very slow; busy waiting is expensive.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This PR include 2 changes to refine the testcases:
1. Now we using IPI to trigger interrupt in testing instead of INT
instruction, this means we don't need to hardcode the vector
number. That can avoid some problem.
Fixes: #40374
2. Refined the test cases. Tigger interrupt by INT instruction and
IPI cannot be masked by irq_disabled(). Unless it's a external
interrupt, such as a timer. Now remove those incorrect part of
these testcases.
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
This commit adds an additional test case for several kernel test suites
to ensure that the linker script generator is working correctly for a
subset of the Zephyr test suites.
The ensures that the basic functionality of the linker script generator
is working while still keep the performance impact on CI at a minimal
level.
Using the kernel tests is a trade-off between testing coverage of the
linker script generator and the time it takes to complete CI.
The kernel tests is considered to have the broadest coverage of various
features important for the generated linker script.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
While reading the code, find typos in the code commits.
tests:kernel:interrupt:src:dynamic_isr, line 110 and 115.
Signed-off-by: Naiyuan Tian <naiyuan.tian@intel.com>
Move to CMake 3.20.0.
At the Toolchain WG it was decided to move to CMake 3.20.0.
The main reason for increasing CMake version is better toolchain
support.
Better toolchain support is added in the following CMake versions:
- armclang, CMake 3.15
- Intel oneAPI, CMake 3.20
- IAR, CMake 3.15 and 3.20
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The default CONFIG_APIC_TIMER_IRQ_PRIORITY is 4, but it should be 1 for
ACRN. That's why the testcase failed due to no timer interrupt was
triggered.
And we also temporary adjust the testing IRQ for dynamic isr due to it
conflict with the IRQ of the APIC TSC deadline TIMER.
Fixes#36203.
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
Every va_start() currently triggers a FPU access trap if FPU is not
already used. This is due to the fact that va_start() must copy FPU
registers that are used for float argument passing into the va_list
object. Flushing the FPU context to its owner and granting access to
the current thread is wasteful if this is only for va_start(),
especially since in most cases there are simply no FP arguments
being passed by the caller.
This is made even worse with exception code (syscalls, IRQ handlers,
etc.) where the exception code has to be resumed with interrupts
disabled upon FPU access as there is no provision for preserving an
interrupted exception mode's FPU context.
Fix those issues by simply simulating the sequence of STR instructions
that the va_start() generates without actually granting FPU access.
We limit ourselves only to exception context to keep changes to a
minimum for now.
This also allows for reverting the ARM64 exception in the nested IRQ
test as it now works properly even if FPU_SHARING is enabled.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The interrupt offload testcases fail on some boards because the timing
of the delay is too short. Refine the testcases and make it not rely
on the delay timing.
Fixes#35097Fixes#35241
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
Should not use -1 as an input parameter for unsigned int. Use zero
instead of -1 as invaild interrupt number to fix coverity warning.
Fixes#35146
CID: 235994
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
Add test cases of direct interrupt for arch x86 and posix.
We register two direct interrupt at build time, then triggering
interrupt and check if ISR handler has executed or not. We also
check irq_enable and irq_disable works.
Why we add an extra compiler option "-mgeneral-regs-only" to make
it works in arch x86. because there might be some existing x87
instructions executing inside interrupt context.
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
Add test cases of regular interrupt for arch x86. This tests basic
functionailty of IRQ_CONNECT(), irq_enable(), irq_disable(),
irq_lock(), irq_unlock().
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
Add 3 test cases to test offload job from isr, include:
1. test_isr_offload_job_multiple()
Validate the offloaded work executes immediately or not depends on its
priority, and it offloads to different k_work.
2. test_isr_offload_job_identi()
Validate the offloaded work executes immediately or not depends on its
priority, and it offloads to the identical k_work.
3. test_isr_offload_job()
Use dynamic interrupt instead of irq_offload() to verify the offloaded
work.
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
This adds FPU sharing support with a lazy context switching algorithm.
Every thread is allowed to use FPU/SIMD registers. In fact, the compiler
may insert FPU reg accesses in anycontext to optimize even non-FP code
unless the -mgeneral-regs-only compiler flag is used, but Zephyr
currently doesn't support such a build.
It is therefore possible to do FP access in IRS as well with this patch
although IRQs are then disabled to prevent nested IRQs in such cases.
Because the thread object grows in size, some tests have to be adjusted.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The test_prevent_interruption() uses a key for the irq_lock(),
but the key has incorrect data type. This commit makes the key
unsigned int according to API docs.
Fixes#34023
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
The interrupt_util.h provides utils of trigger irq, now move them into
testsuite. All of the needed test cases can make use of them.
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
Improve dynamic interrupt test cases of interrupt for platform such as
x86, x86_64, native_posix, this improve code coverage of it.
Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
tests/kernel/interrupt tests interrupt trigger functionality,
however, the Non-Secure Cortex-M mode does not have full control
of the interrupt handling, so this test cannot be guaranteed to
pass when executing in Non-Secure mode. Filter the test out for
Non-Secure Cortex-M builds.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
GICv3 is now support for SGI generation and test case is updated
to use GICv3 apis. bcm958402m2_a72 can be enabled now.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
GICC_BPR has minimum legal values in secure and non-secure states.
'3' is the minimum BPR value leading to group and sub-group priority
as 'gggg.ssss'. In order to make an IRQ preemptible they need to
be in different priority group.
Hence to be generic priority values should be above '0x0f'.
IRQ0 - default priority (low prio)
IRQ1 - 0x0 (highest prio)
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
... because it is (required).
This makes a difference when building with CMake and forgetting
ZEPHYR_BASE or not registering Zephyr in the CMake package registry.
In this particular case, REQUIRED turns this harmless looking log
statement:
-- Could NOT find Zephyr (missing: Zephyr_DIR)
-- The C compiler identification is GNU 9.3.0
-- The CXX compiler identification is GNU 9.3.0
-- Check for working C compiler: /usr/bin/cc
-- ...
-- ...
-- ...
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Error at CMakeLists.txt:8 (target_sources):
Cannot specify sources for target "app" which is not built by
this project.
... into this louder, clearer, faster and (last but not least) final
error:
CMake Error at CMakeLists.txt:5 (find_package):
Could not find a package configuration file provided by "Zephyr" with
any of the following names:
ZephyrConfig.cmake
zephyr-config.cmake
Add the installation prefix of "Zephyr" to CMAKE_PREFIX_PATH or set
"Zephyr_DIR" to a directory containing one of the above files. If
"Zephyr" provides a separate development package or SDK, be sure it
has been installed.
-- Configuring incomplete, errors occurred!
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This commit enables nested interrupt test for the Cortex-R platforms
that use the ARM Generic Interrupt Controller (GIC).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Kernel timeouts have always been a 32 bit integer despite the
existence of generation macros, and existing code has been
inconsistent about using them. Upcoming commits are going to make the
timeout arguments opaque, so fix things up to be rigorously correct.
Changes include:
+ Adding a K_TIMEOUT_EQ() macro for code that needs to compare timeout
values for equality (e.g. with K_FOREVER or K_NO_WAIT).
+ Adding a k_msleep() synonym for k_sleep() which can continue to take
integral arguments as k_sleep() moves away to timeout arguments.
+ Pervasively using the K_MSEC(), K_SECONDS(), et. al. macros to
generate timeout arguments.
+ Removing the usage of K_NO_WAIT as the final argument to
K_THREAD_DEFINE(). This is just a count of milliseconds and we need
to use a zero.
This patch include no logic changes and should not affect generated
code at all.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This commit enables nested interrupt test for the Cortex-A platforms
that use the ARM Generic Interrupt Controller (GIC).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the nested interrupt testing support for the ARM
Generic Interrupt Controller (GIC).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds an explanation comment for the interrupt priorities
used by the Cortex-M nested interrupt test.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit disables the nested interrupt test for the RISC-V platform,
as interrupt nesting is not supported on the current RISV-C
architecture port.
Furthermore, the current `trigger_irq` implementation for RISC-V is
mostly incorrect and cannot be used, so there is no point in leaving
that in the codebase (see #23593).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The current nested interrupt test implementation is both buggy and
fundamentally flawed because it does not trigger a higher priority
interrupt from a lower priority interrupt context and relies on the
system timer interrupt, which is not fully governed by the test;
moreover, the current implementation does not properly validate the
test results and can report success if no interrupt is triggered and
serviced at all.
This commit reworks this test to have the following well-defined
and logical procedure:
1. [thread] Trigger IRQ 0 (lower priority)
2. [isr0] Set ISR 0 result token and trigger IRQ 1 (higher priority)
3. [isr1] Set ISR 1 result token and return
4. [isr0] Validate ISR 1 result token and return
5. [thread] Validate ISR 0 result token
The reworked test scenario ensures that the interrupt nesting works
properly and any abnormal conditions are detected (e.g. interrupts not
triggering at all, or ISR 1 not being nested under ISR 0).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit re-organises the kernel interrupt tests for consistency.
In addition, it removes any references to the `irq_offload` feature,
which is no longer used by this test.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Using find_package to locate Zephyr.
Old behavior was to use $ENV{ZEPHYR_BASE} for inclusion of boiler plate
code.
Whenever an automatic run of CMake happend by the build system / IDE
then it was required that ZEPHYR_BASE was defined.
Using ZEPHYR_BASE only to locate the Zephyr package allows CMake to
cache the base variable and thus allowing subsequent invocation even
if ZEPHYR_BASE is not set in the environment.
It also removes the risk of strange build results if a user switchs
between different Zephyr based project folders and forgetting to reset
ZEPHYR_BASE before running ninja / make.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The test itself handles correctly whether gen_isr_table
style dynamic interrupts are supported or not, there's
no need for an alternate scenario.
The tests work fine on riscv32 now, remove the exclusion.
Add a github link as to why Nios II is still excluded.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The author of this test case seems to have been under the
mistaken impression that interrupts are locked in ISRs, which
is untrue.
The only reason this ever passed, anywhere, was a race between
the timer firing and the zassert_not_equal() check in
offload_function. If the busy_wait call is moved after the timer
is started, this fails everywhere.
We do not re-use the timer object from the previous case,
resolving some crashes observed on riscv.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The test tries to mask CPU interrupts and then enable a k_timer,
passing if it didn't fire.
This is totally defeated if the interrupt just fires on another
CPU that doesn't have interrupts masked.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.
There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.
Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.
Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Carlo Caione