This is just a stub with bits of information about RISC-V support on
Zephyr, that can and should be improved over time.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
List of the changes:
* add info about ARCv3 32bit HS5x which support has been
upstreamed recently
* mark HS6x MWDT toolchain support as Y
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
At some recent point, directory <zephyr-root>/include was moved to
<zephyr-root>/include/zephyr. However, links from documentation to
Zephyr source on Github were not updated. Update them now.
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
Add a guide section on how to use semihosting with an example code
section on opening a file to read data from it.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Ederson de Souza