Commit Graph

7 Commits

Author SHA1 Message Date
Savinay Dharmappa bf389e0853 drivers: watchdog: Add dts support for QMSI based watchdog.
patch adds the device binding for qmsi watchdog and device node
for socs which are using wdt qmsi driver.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 14:16:03 -04:00
Anas Nashif 071c9dc0f3 soc: logging: move soc tree to new logger
Use the new logger framework for soc related code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Sebastian Bøe 8eb734cd82 DT: Rename from dts.fixup to dts_fixup.h
The Zephyr configuration system uses many different files in many
different formats. It makes it a lot easier for users to understand
what these files do if when we use the correct file extensions.

To this end we rename the dts.fixup files to the correct file
extension '.h'.

This is a breaking change for out-of-tree fixup files. Such files will
be detected and given an appropriate error message.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-10-08 11:38:56 -04:00
Ramakrishna Pallala 3a8e37caae soc: x86: quark_se: Select the supported Power States
Select the Low Power States supported by Intel Quark SE SoC series.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-09-28 06:54:15 +05:30
Maureen Helm 0be600016c soc: x86: arc: Remove spi base address and irq macros
Now that we get the spi base address and irq numbers from dts, we can
remove the preprocessor macros from soc.h

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-28 06:27:06 +05:30
Maureen Helm 55caa7b743 drivers: spi: Select HAS_DTS_SPI in designware driver
Makes the designware spi driver consistent with other spi drivers by
selecting HAS_DTS_SPI in the driver. This required adding spi nodes and
dts fixups to several arc and x86 socs, as well as enabling those nodes
in associated boards.

Also refactors the driver to use the base address, interrupt number, and
interrupt priority from dts.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-28 06:27:06 +05:30
Anas Nashif cff0005a87 x86: move soc/cpu to top-level under soc/
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00