Commit Graph

14 Commits

Author SHA1 Message Date
Christopher Friedt dd33a8152a samples: philosophers: remove redundant items in prj.conf
The normal and posix philosophers samples seemed to have
a number of redundant choices in prj.conf.

Let's reduce to the minimum required for the sample. The
CONFIG_DEBUG_THREAD_INFO option is part of the
documentation, so leave it as-is.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2024-02-01 05:26:24 -05:00
Kumar Gala ad5966a432 samples: move to using CONFIG_MP_MAX_NUM_CPUS=1
For samples that set CONFIG_MP_NUM_CPUS=1, switch to using
CONFIG_MP_MAX_NUM_CPUS=1 instead as we work to phase out
CONFIG_MP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-20 22:04:10 +09:00
Gerson Fernando Budke b6c2ae8048 samples: philosophers: Enable thread awareness
Enable thread awareness by default on philosophers sample.  It shows
gdb debugging output using the feature as reference.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-08-30 13:18:04 -04:00
Andy Ross d1200d2155 tests: Never disable SMP
Disabling SMP mode for certain tests was a one-release thing, done to
avoid having to triage every test independently (MANY are not
SMP-safe), and with the knowledge that it was probably hiding bugs in
the kernel.

Turn it on pervasively.  Tests are treated with a combination of
flagging specific cases as "1cpu" where we have short-running tests
that can be independently run in an otherwise SMP environment, and via
setting CONFIG_MP_NUM_CPUS=1 where that's not possible (which still
runs the full SMP kernel config, but with only one CPU available).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-09-26 16:54:06 -04:00
Andy Ross f288d1e4a7 tests: samples: Apps shouldn't set tick rate
Tick rate is becoming a platform tunable in the tickless world.  Some
apps were setting it due to requirements of drivers or subsystems (or
sometimes for reasons that don't make much sense), but the dependency
goes the other way around now: board/soc/arch level code is
responsible for setting tick rates that work with their devices.

A few tests still use hard-configured tick rates, as they have
baked-in assumptions (like e.g. "a tick will be longer than a
millisecond") that need to be addressed first.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-07-02 22:52:29 -04:00
Andy Ross 4f04f6486d tests: More SMP disablement
A few more test cases that are measurably unreliable when run in SMP.
For the most part these work most of the time (though the semaphore
one was pretty borderline -- I measured about 25% failures), but are
measurably unstable against the backdrop of known qemu instability.
Something is clearly going on and we need to come back to these to fix
threadsafety issues.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-03-20 11:33:29 -05:00
Andy Ross dd33b37eff tests/sched/scheduler_api: samples/philosophers: Use SCHED_SCALABLE
These two tests ask for lots of priority levels, more than the 32
maximum allowed by SCHED_MULTIQ (which is by design: if you have
requirements like that DUMB or SCALABLE are better choices due to the
RAM overhead of MULTIQ), so the build will fail on boards that defined
MULTIQ as default.

Don't let the platform choose the scheduler backend, ask for SCALABLE
explicitly.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-07-03 17:09:15 -04:00
Paul Sokolovsky b2ce9df077 tests: Few test require CONFIG_STDOUT_CONSOLE=n
For some, "y" affects output, for some less tested platforms, leads
to crashes.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2018-02-05 07:05:12 -08:00
Anas Nashif 45a7e5d076 kernel: remove legacy.h and MDEF support
Change-Id: I953797f6965354c5b599f4ad91d63901401d2632
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-04-19 10:59:35 -05:00
Anas Nashif 0650911a0d samples: philosophers: adjust stack size and build by sanitycheck
Jira: ZEP-1598
Change-Id: I5e2126e946c0a4935d938051acd98702065f458e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-02 14:44:46 +00:00
Benjamin Walsh dd2f554239 samples: configure philosophers with more than 32 priorities
To have one project use more than 32 priorities. The preempt priorities
are also aligned so that they straddle two priority bitmaps.

Change-Id: I0f0862110d876e40fde45a0d105b769e8603d644
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-18 23:45:35 +00:00
Andrew Boie 252144f6e8 samples: remove old kernel support
Change-Id: I89ab1e1926e2e8f07f8c8d5538a7587a605cb36b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-07 11:34:18 -08:00
Andrew Boie ef09f8dd5f tests: remove errant -O0
Should never be necessary.

Change-Id: I8c7d1be3e9c9279e12ed6f26d8ab8404ee7d6cb0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-07 19:29:01 +00:00
Anas Nashif 269d38bcda samples: philosophers: move legacy applications to legacy/
Change-Id: Id67ecd44e44be4821bad8894154cfbcbdcea0634
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-11-02 22:05:28 +00:00