zephyr

Commit Graph

Author	SHA1	Message	Date
Johan Lafon	a63bb6317c	drivers: rtc: stm32: allow new RTC driver to work with BBRAM STM32 BBRAM depends on RTC to work. This changes STM32 RTC init stage to PRE_KERNEL_1 to allow RTC driver to initialize before BBRAM driver. Some adjustments are made so that kernel API is not used during the init procedure. Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>	2023-09-20 11:34:52 +01:00
Patryk Duda	e02456a52d	drivers: bbram: Introduce STM32 BBRAM driver STM32 battery-backed RAM is organized in 4 byte registers. Number of registers can vary between models from 5 to 32 registers. Usually, the registers are part of RTC. On some variants they are part of tamper module. On STM32F1 the registers are in separate module. For now, only backup registers from RTC are supported. Signed-off-by: Patryk Duda <pdk@semihalf.com>	2022-12-08 16:47:09 +09:00

Author

SHA1

Message

Date

Johan Lafon

a63bb6317c

drivers: rtc: stm32: allow new RTC driver to work with BBRAM

STM32 BBRAM depends on RTC to work. This changes STM32 RTC init stage to
PRE_KERNEL_1 to allow RTC driver to initialize before BBRAM driver.

Some adjustments are made so that kernel API is not used during the init
procedure.

Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>

2023-09-20 11:34:52 +01:00

Patryk Duda

e02456a52d

drivers: bbram: Introduce STM32 BBRAM driver

STM32 battery-backed RAM is organized in 4 byte registers. Number of
registers can vary between models from 5 to 32 registers.

Usually, the registers are part of RTC. On some variants they are part
of tamper module. On STM32F1 the registers are in separate module. For
now, only backup registers from RTC are supported.

Signed-off-by: Patryk Duda <pdk@semihalf.com>

2022-12-08 16:47:09 +09:00

2 Commits