The nRF54H20 Development Kit version 0.8.0 is no longer supported, given
that they should have all been replaced by 0.9.x.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Extended UICR will not be used as its configurations will be merged
with the UICR registers in NVR.
Memory maps changes are needed to align with pre compiled
firmware.
Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
The nRF54 and nRF92 chips has data cache, which means
the ICMsg and ICBMsg must be configured to follow required
cache alignment of the shared memory.
The `dcache-alignement` needs to be defined for that.
Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
Doc and .yaml descriptions shall mention retained_mem
in supported features on affected boards.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Update the default memory maps for `nrf54h20dk` and `nrf9280pdk` to
remove the `shared_ram20_region` and `shared_ram3x_region` nodes,
because their child nodes no longer need to be grouped together:
* IPC buffers in RAM20 are statically allocated.
* DMA buffers in RAM3x have separate access owners.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Apply the following changes to `nrf54h20dk` and `nrf9280pdk`:
* Convert `perm-*` properties to the newly introduced `nordic,access`,
both in board files and tests.
* Redefine shared regions to specify multiple access owners per node,
and ensure that each such region is reserved by one domain at a time.
`cpuapp_cpurad_ram0x_region` is only enabled by Radiocore, while
`cpuapp_cpucell_ram0x_region` is only enabled by Application core.
* Divide `shared_ram3x_region` so that each sub-region is owned by a
different domain. Their addresses must be rounded down to fit the
current UICR format.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Like in all other legacy boards, hw-flow-control should not be
enabled for console UART. With hw-flow-control sample stuck
during printing some initial information and sample appears to
be not working correctly unless com port is opened.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Full name was set based on the information available either in board
documentation or in Twister files.
Whenever applicable, vendor name was dropped from the full name so that
all boards have a consistent naming scheme.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Some tests are failing on nrf54h20 cpurad in non-obvious manner
because of this memory region being too small.
Instead of adding overlays to each individual application,
make this region larger at expense of cpuapp equivalent.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Version 2 of the ADAC interface implemented by secure domain firmware
changes the ADAC RESET command used in the custom reset handling in
the JLink support scripts. The command has been split into two
commands, RESET and START, and has different semantics from
the previous RESET command. The new RESET command resets both the
application and radio domains without starting the CPUs again, and the
START command must then be used to start the CPUs.
Update the JLink support scripts for nrf54h20dk/nrf54h20/cpuapp,
nrf54h20dk/nrf54h20/cpurad, nrf9280pdk/nrf9280/cpuapp and
nrf9280pdk/nrf9280/cpurad so that they read out the ADAC interface
version from the device and use the newer commands if ADAC version 2 is
detected. If the version is lower than 2, the legacy implementation is
used.
Also improve the CTRL-AP MAILBOX transaction implementation
to avoid the need for arbitrary sleeps or unnecessary polling of
the MAILBOX. This should improve stability when using the script.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
dcache-alignement needs to be defined for ipc to have
consistent memory organization on both endpoints, when
shared memory is cacheable. nrf54h20 and nrf9280 are
using cacheable shared memory.
This is applied for ipc with icmsg backend.
Signed-off-by: Lukasz Stepnicki <lukasz.stepnicki@nordicsemi.no>
Add a new revision for nRF54H20 DK: 0.9.0. This new hardware spin contains
the final nRF54H20 SoC. Treat it as the default, including twister.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The current DK is labeled as revision 0.8.0. Until now, no revisions were
needed, but a new hardware spin is coming, so we'll need to keep at least
two revisions in the near future until the final one becomes the default.
Prepare the board for that scenario. Note that the "old" nRF54H20 SoC is
now nRF54H20 EngB.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This region is only required if certain fast peripherals make use of such
region for DMAing. It was now enabled on all builds, often resulting in:
```
[134/134] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 24372 B 248 KB 9.60%
RAM: 4448 B 256 KB 1.70%
DMA_RAM21: 0 GB 16 KB 0.00% <~~ Not used!
DMA_RAM3x_APP: 40 B 4 KB 0.98%
IDT_LIST: 0 GB 32 KB 0.00%
```
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add the necessary entries but keep the usbhs disabled by default on
radio core (it is enabled by default on app core).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Adds missing code-sample directive to the Hello World sample in
preparation for upcoming changes to the Zephyr documentation that will
be leveraging the provided description and metadata.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Align settings and DFU partition definition with the values, specified
by the design documentation.
Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
These parameters will be used by the clock controller drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
While executing from MRAM will likely never happen in practice for the
FLPR core, add such variant for testing.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Extend Twister configuration for nrf54h20dk/nrf54h20/cpuppr.
Add counter and i2c to the list of supported peripherals.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Nrf54h's and nrf54l's targets are the first targets complex enough
that a sysbuild must be used on every build for them. This information
is reflected in their yamls. These entries tell twister to always use
sysbuild for those targets.
Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
The drivers should be independent after the move to the new HCI driver
API. Having them as a choice also has unexpected consequences with some
drivers being unexpectedly enabled.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
We have recently added a new platform where the USB controller is only
supported in the new USB device support. This forces us to introduce a
new supported feature tag to distinguish the dependency. Use "usbd",
which is also the prefix of the new device support.
There are many boards that already have new driver support, but we will
replace the "usb_device" feature when the old device support is
deprecated.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
A custom reset scheme is required for the nRF54H20 SoC so that debug
works out of the box. This magic will eventually be part of JLink.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This memory region is used for not only but also DMA transfers
of the fast peripherals.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Access to this region should no longer be requested via UICR, because it
will be statically reserved by secure domain firmware.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
It is enough to test watchdog driver on the application core.
Otherwise, at least three samples/tests fail due to missing
overlay file for nrf54h20dk/nrf54h20/cpurad.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Carles Cufi