ARC: enable barriers for HS
As we start to use data memory barriers in SMP scheduler code explicitly (not only internaly in the atomics implementation) let's enable barriers for ARC HS. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
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@ -18,6 +18,7 @@ config CPU_ARCEM
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config CPU_ARCHS
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bool
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select ATOMIC_OPERATIONS_BUILTIN
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select BARRIER_OPERATIONS_BUILTIN
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help
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This option signifies the use of an ARC HS CPU
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