drivers: i2c: Refactor Atmel SAM (TWIHS) driver
Various minor changes to the Atmel SAM (TWIHS) driver - clean up variable names, comments - refactor i2c_clk_set function - do not save configuration in dev_data - improve ISR NACK handling - print "Device initialized" string Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit is contained in:
Piotr Mienkowski
Kumar Gala
parent
3f4fb4a3b6
commit
e7dd844c6a
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017 Piotr Mienkowski
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -27,15 +28,18 @@
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#define BUS_SPEED_FAST_HZ 400000U
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/** I2C bus speed [Hz] in High Speed Mode */
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#define BUS_SPEED_HIGH_HZ 3400000U
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/* Maximum value of Clock Divider (CKDIV) */
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#define CKDIV_MAX 7
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/* Device constant configuration parameters */
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struct twihs_sam_dev_cfg {
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Twihs *regs;
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void (*irq_config)(void);
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u8_t periph_id;
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u8_t irq_id;
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u32_t mode_config;
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const struct soc_gpio_pin *pin_list;
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u8_t pin_list_size;
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u8_t periph_id;
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u8_t irq_id;
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};
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struct twihs_msg {
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@ -54,46 +58,56 @@ struct twihs_msg {
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/* Device run time data */
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struct twihs_sam_dev_data {
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struct k_sem sem;
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u32_t mode_config;
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struct twihs_msg msg;
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};
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#define DEV_NAME(dev) ((dev)->config->name)
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#define DEV_CFG(dev) \
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((const struct twihs_sam_dev_cfg *const)(dev)->config->config_info)
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#define DEV_DATA(dev) \
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((struct twihs_sam_dev_data *const)(dev)->driver_data)
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static u32_t clk_div_calc(u32_t speed)
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static int i2c_clk_set(Twihs *const twihs, u32_t speed)
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{
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u32_t ck_div = 0;
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u32_t cl_div;
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u32_t div_completed = 0;
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bool div_completed = false;
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/* From the datasheet "TWIHS Clock Waveform Generator Register"
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* T_low = ( ( CLDIV × 2^CKDIV ) + 3 ) × T_MCK
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*/
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while (!div_completed) {
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cl_div = ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (2 * speed)) - 4)
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cl_div = ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (2 * speed)) - 3)
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/ (1 << ck_div);
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if (cl_div <= 255) {
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div_completed = 1;
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div_completed = true;
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} else {
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ck_div++;
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}
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}
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if (ck_div > CKDIV_MAX) {
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SYS_LOG_ERR("Failed to configure I2C clock");
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return -EIO;
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}
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/* Set TWI clock duty cycle to 50% */
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return (ck_div << 16) | (cl_div << 8) | cl_div;
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twihs->TWIHS_CWGR = TWIHS_CWGR_CLDIV(cl_div) | TWIHS_CWGR_CHDIV(cl_div)
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| TWIHS_CWGR_CKDIV(ck_div);
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return 0;
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}
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static int twihs_sam_configure(struct device *dev, u32_t config)
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{
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const struct twihs_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);
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struct twihs_sam_dev_data *const dev_data = DEV_DATA(dev);
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Twihs *const twihs = dev_cfg->regs;
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u32_t i2c_speed;
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u32_t clk;
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u32_t bitrate;
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int ret;
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if (!(config & I2C_MODE_MASTER)) {
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SYS_LOG_ERR("Master I2C Mode is enabled");
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SYS_LOG_ERR("Master Mode is not enabled");
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return -EIO;
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}
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@ -103,23 +117,24 @@ static int twihs_sam_configure(struct device *dev, u32_t config)
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return -EIO;
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}
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dev_data->mode_config = config;
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/* Configure clock */
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switch (I2C_SPEED_GET(dev_data->mode_config)) {
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switch (I2C_SPEED_GET(config)) {
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case I2C_SPEED_STANDARD:
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i2c_speed = BUS_SPEED_STANDARD_HZ;
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bitrate = BUS_SPEED_STANDARD_HZ;
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break;
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case I2C_SPEED_FAST:
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i2c_speed = BUS_SPEED_FAST_HZ;
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bitrate = BUS_SPEED_FAST_HZ;
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break;
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default:
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SYS_LOG_ERR("Unsupported I2C speed value");
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return -EIO;
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}
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clk = clk_div_calc(i2c_speed);
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twihs->TWIHS_CWGR = clk;
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/* Setup clock waveform */
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ret = i2c_clk_set(twihs, bitrate);
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if (ret < 0) {
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return ret;
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}
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/* Disable Slave Mode */
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twihs->TWIHS_CR = TWIHS_CR_SVDIS;
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@ -135,11 +150,10 @@ static void write_msg_start(Twihs *const twihs, struct twihs_msg *msg,
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{
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/* Set slave address and number of internal address bytes. */
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twihs->TWIHS_MMR = TWIHS_MMR_DADR(daddr);
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/* Set internal address bytes */
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twihs->TWIHS_IADR = 0;
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/* Write first data byte on I2C bus */
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twihs->TWIHS_THR = msg->buf[msg->idx++];
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/* Enable Transmit Ready and Transmission Completed interrupts */
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twihs->TWIHS_IER = TWIHS_IER_TXRDY | TWIHS_IER_TXCOMP | TWIHS_IER_NACK;
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}
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@ -151,8 +165,6 @@ static void read_msg_start(Twihs *const twihs, struct twihs_msg *msg,
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/* Set slave address and number of internal address bytes */
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twihs->TWIHS_MMR = TWIHS_MMR_MREAD | TWIHS_MMR_DADR(daddr);
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/* Set internal address bytes */
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twihs->TWIHS_IADR = 0;
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/* Enable Receive Ready and Transmission Completed interrupts */
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twihs->TWIHS_IER = TWIHS_IER_RXRDY | TWIHS_IER_TXCOMP | TWIHS_IER_NACK;
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@ -175,6 +187,12 @@ static int twihs_sam_transfer(struct device *dev, struct i2c_msg *msgs,
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return 0;
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}
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/* Clear pending interrupts, such as NACK. */
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(void)twihs->TWIHS_SR;
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/* Set number of internal address bytes to 0, not used. */
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twihs->TWIHS_IADR = 0;
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for (int i = 0; i < num_msgs; i++) {
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dev_data->msg.buf = msgs[i].buf;
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dev_data->msg.len = msgs[i].len;
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@ -190,8 +208,7 @@ static int twihs_sam_transfer(struct device *dev, struct i2c_msg *msgs,
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k_sem_take(&dev_data->sem, K_FOREVER);
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if (dev_data->msg.twihs_sr > 0) {
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/* Something went wrong, send bus CLEAR command */
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twihs->TWIHS_CR = TWIHS_CR_CLEAR;
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/* Something went wrong */
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return -EIO;
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}
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}
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@ -214,6 +231,7 @@ static void twihs_sam_isr(void *arg)
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/* Not Acknowledged */
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if (isr_status & TWIHS_SR_NACK) {
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msg->twihs_sr = isr_status;
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goto tx_comp;
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}
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/* Byte received */
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@ -236,21 +254,26 @@ static void twihs_sam_isr(void *arg)
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/* Disable Transmit Ready interrupt */
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twihs->TWIHS_IDR = TWIHS_IDR_TXRDY;
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} else {
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/* Transfer completed */
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isr_status |= TWIHS_SR_TXCOMP;
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/* Transmission completed */
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goto tx_comp;
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}
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} else {
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twihs->TWIHS_THR = msg->buf[msg->idx++];
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}
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}
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/* Transfer completed */
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/* Transmission completed */
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if (isr_status & TWIHS_SR_TXCOMP) {
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/* Disable all enabled interrupts */
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twihs->TWIHS_IDR = twihs->TWIHS_IMR;
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/* All data transferred, nothing else to do */
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k_sem_give(&dev_data->sem);
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goto tx_comp;
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}
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return;
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tx_comp:
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/* Disable all enabled interrupts */
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twihs->TWIHS_IDR = twihs->TWIHS_IMR;
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/* We are done */
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k_sem_give(&dev_data->sem);
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}
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static int twihs_sam_initialize(struct device *dev)
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@ -258,7 +281,7 @@ static int twihs_sam_initialize(struct device *dev)
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const struct twihs_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);
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struct twihs_sam_dev_data *const dev_data = DEV_DATA(dev);
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Twihs *const twihs = dev_cfg->regs;
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int result;
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int ret;
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/* Configure interrupts */
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dev_cfg->irq_config();
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@ -275,14 +298,17 @@ static int twihs_sam_initialize(struct device *dev)
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/* Reset TWI module */
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twihs->TWIHS_CR = TWIHS_CR_SWRST;
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result = twihs_sam_configure(dev, dev_data->mode_config);
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if (result < 0) {
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return result;
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ret = twihs_sam_configure(dev, dev_cfg->mode_config);
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if (ret < 0) {
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SYS_LOG_ERR("Failed to initialize %s device", DEV_NAME(dev));
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return ret;
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}
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/* Enable module's IRQ */
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irq_enable(dev_cfg->irq_id);
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SYS_LOG_INF("Device %s initialized", DEV_NAME(dev));
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return 0;
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}
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@ -311,12 +337,11 @@ static const struct twihs_sam_dev_cfg i2c0_sam_config = {
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.irq_id = TWIHS0_IRQn,
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.pin_list = pins_twihs0,
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.pin_list_size = ARRAY_SIZE(pins_twihs0),
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};
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static struct twihs_sam_dev_data i2c0_sam_data = {
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.mode_config = CONFIG_I2C_0_DEFAULT_CFG,
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};
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static struct twihs_sam_dev_data i2c0_sam_data;
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DEVICE_AND_API_INIT(i2c0_sam, CONFIG_I2C_0_NAME, &twihs_sam_initialize,
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&i2c0_sam_data, &i2c0_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &twihs_sam_driver_api);
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@ -329,7 +354,7 @@ static struct device DEVICE_NAME_GET(i2c1_sam);
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static void i2c1_sam_irq_config(void)
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{
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IRQ_CONNECT(TWIHS0_IRQn, CONFIG_I2C_1_IRQ_PRI, twihs_sam_isr,
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IRQ_CONNECT(TWIHS1_IRQn, CONFIG_I2C_1_IRQ_PRI, twihs_sam_isr,
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DEVICE_GET(i2c1_sam), 0);
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}
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@ -342,12 +367,11 @@ static const struct twihs_sam_dev_cfg i2c1_sam_config = {
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.irq_id = TWIHS1_IRQn,
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.pin_list = pins_twihs1,
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.pin_list_size = ARRAY_SIZE(pins_twihs1),
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};
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static struct twihs_sam_dev_data i2c1_sam_data = {
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.mode_config = CONFIG_I2C_1_DEFAULT_CFG,
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};
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static struct twihs_sam_dev_data i2c1_sam_data;
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DEVICE_AND_API_INIT(i2c1_sam, CONFIG_I2C_1_NAME, &twihs_sam_initialize,
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&i2c1_sam_data, &i2c1_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &twihs_sam_driver_api);
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@ -373,12 +397,11 @@ static const struct twihs_sam_dev_cfg i2c2_sam_config = {
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.irq_id = TWIHS2_IRQn,
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.pin_list = pins_twihs2,
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.pin_list_size = ARRAY_SIZE(pins_twihs2),
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};
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static struct twihs_sam_dev_data i2c2_sam_data = {
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.mode_config = CONFIG_I2C_2_DEFAULT_CFG,
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};
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static struct twihs_sam_dev_data i2c2_sam_data;
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DEVICE_AND_API_INIT(i2c2_sam, CONFIG_I2C_2_NAME, &twihs_sam_initialize,
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&i2c2_sam_data, &i2c2_sam_config, POST_KERNEL,
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CONFIG_I2C_INIT_PRIORITY, &twihs_sam_driver_api);
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