diff --git a/dts/bindings/clock/st,stm32h7-pll-clock.yaml b/dts/bindings/clock/st,stm32h7-pll-clock.yaml
index 8b4e9d5d105..702e92cec71 100644
--- a/dts/bindings/clock/st,stm32h7-pll-clock.yaml
+++ b/dts/bindings/clock/st,stm32h7-pll-clock.yaml
@@ -39,7 +39,7 @@ properties:
       description: |
           Division factor for PLLx
           input clock
-          Valid range: 0 - 63
+          Valid range: 1 - 63
 
     mul-n:
       type: int