drivers: gpio: stm32: Apply GPIOG specific code to U5 series

In STM32U5 as well it is required to enable VDD before use.
Difference is that U5 enables this under PWR_SVMCR_IO2SV flag.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2022-09-14 13:59:10 +02:00 committed by Fabio Baltieri
parent 83f0ba7d1a
commit e1cb0845b4
1 changed files with 2 additions and 1 deletions

View File

@ -706,7 +706,8 @@ static int gpio_stm32_init(const struct device *dev)
return -ENODEV;
}
#if defined(PWR_CR2_IOSV) && DT_NODE_HAS_STATUS(DT_NODELABEL(gpiog), okay)
#if (defined(PWR_CR2_IOSV) || defined(PWR_SVMCR_IO2SV)) && \
DT_NODE_HAS_STATUS(DT_NODELABEL(gpiog), okay)
z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
/* Port G[15:2] requires external power supply */
/* Cf: L4/L5 RM, Chapter "Independent I/O supply rail" */