soc: designstart: Port to HWMv2

Ports the designstart SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae 2024-02-06 14:51:55 +00:00 committed by Carles Cufi
parent f5792b05e7
commit d5473b76fe
13 changed files with 35 additions and 75 deletions

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@ -1,3 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_include_directories(.)
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

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@ -1,20 +1,15 @@
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
choice
prompt "ARM DesignStart SoCs"
depends on SOC_SERIES_ARM_DESIGNSTART
config SOC_SERIES_ARM_DESIGNSTART
select ARM
config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1
bool "ARM Cortex-M1 DesignStart FPGA"
select CPU_CORTEX_M1
imply XIP
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3
bool "ARM Cortex-M3 DesignStart FPGA"
select CPU_CORTEX_M3
imply XIP
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
endchoice

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@ -0,0 +1,27 @@
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_ARM_DESIGNSTART
bool
select SOC_FAMILY_ARM
help
ARM DesignStart SoC Series
config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1
bool
select SOC_SERIES_ARM_DESIGNSTART
help
ARM Cortex-M1 DesignStart FPGA
config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3
bool
select SOC_SERIES_ARM_DESIGNSTART
help
ARM Cortex-M3 DesignStart FPGA
config SOC_SERIES
default "designstart" if SOC_SERIES_ARM_DESIGNSTART
config SOC
default "designstart_fpga_cortex_m1" if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1
default "designstart_fpga_cortex_m3" if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3

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@ -15,6 +15,10 @@ family:
socs:
- name: musca_b1
- name: musca_s1
- name: designstart
socs:
- name: designstart_fpga_cortex_m1
- name: designstart_fpga_cortex_m3
- name: arm64
series:
- name: fvp_aemv8a

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@ -1,3 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
add_subdirectory(${SOC_SERIES})

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@ -1,15 +0,0 @@
# ARM LTD SoC configuration options
# Copyright (c) 2016 Linaro Limited
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_ARM
bool
if SOC_FAMILY_ARM
config SOC_FAMILY
string
default "arm"
source "soc/soc_legacy/arm/arm/*/Kconfig.soc"
endif # SOC_FAMILY_ARM

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@ -1,6 +0,0 @@
# ARM LTD SoC configuration options
# Copyright (c) 2016 Linaro Limited
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm/arm/*/Kconfig.defconfig.series"

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@ -1,6 +0,0 @@
# ARM LTD SoC configuration options
# Copyright (c) 2016 Linaro Limited
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/arm/arm/*/Kconfig.series"

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@ -1,9 +0,0 @@
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1
config SOC
default "designstart_cortex_m1"
endif # SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1

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@ -1,9 +0,0 @@
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3
config SOC
default "designstart_cortex_m3"
endif # SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3

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@ -1,11 +0,0 @@
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_ARM_DESIGNSTART
config SOC_SERIES
default "designstart"
source "soc/soc_legacy/arm/arm/designstart/Kconfig.defconfig.cortex*"
endif # SOC_SERIES_ARM_DESIGNSTART

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@ -1,9 +0,0 @@
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_ARM_DESIGNSTART
bool "Arm DesignStart SoC Series"
select ARM
select SOC_FAMILY_ARM
help
Enable support for the ARM DesignStart SoC Series