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boards: arm: bl652_dvk: migrate to pinctrl 

Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-03-16 18:10:19 +01:00 committed by Carles Cufí
parent f3d5c628e8
commit d47b8c3e55
3 changed files with 106 additions and 13 deletions
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88
boards/arm/bl652_dvk/bl652_dvk-pinctrl.dtsi Normal file
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@ -0,0 +1,88 @@
/*
* Copyright (c) 2022 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 25)>,
<NRF_PSEL(SPIM_MOSI, 0, 23)>,
<NRF_PSEL(SPIM_MISO, 0, 24)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 25)>,
<NRF_PSEL(SPIM_MOSI, 0, 23)>,
<NRF_PSEL(SPIM_MISO, 0, 24)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 16)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 14)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 16)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 14)>;
low-power-enable;
};
};
};

29
boards/arm/bl652_dvk/bl652_dvk.dts
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@ -6,6 +6,7 @@
/dts-v1/;
#include <nordic/nrf52832_qfaa.dtsi>
#include "bl652_dvk-pinctrl.dtsi"
/ {
model = "Laird BL652 DVK";
@ -71,18 +72,18 @@
status = "okay";
compatible = "nordic,nrf-uart";
current-speed = <115200>;
tx-pin = <6>;
rx-pin = <8>;
rts-pin = <5>;
cts-pin = <7>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
sda-pin = <26>;
scl-pin = <27>;
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
dac0: mcp4725@60 {
/* MCP4725 not populated at factory */
compatible = "microchip,mcp4725";
@ -95,26 +96,28 @@
&pwm0 {
status = "okay";
ch0-pin = <17>;
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0. */
/* status = "okay"; */
sck-pin = <25>;
mosi-pin = <23>;
miso-pin = <24>;
cs-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
sck-pin = <16>;
mosi-pin = <20>;
miso-pin = <14>;
cs-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&flash0 {

2
boards/arm/bl652_dvk/bl652_dvk_defconfig
View File

@ -27,3 +27,5 @@ CONFIG_GPIO_AS_PINRESET=y
# 32kHz clock source
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y
CONFIG_PINCTRL=y