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intel_adsp: ace30: Correct power control register bitfield definitions 

This patch updates the power control and status register bitfield
definitions in the ACE30 PTL ADSP power management header to match the
documented hardware specifications. The previous definitions contained
discrepancies that did not align with the actual hardware layout,
potentially leading to incorrect assumptions and usage within the
firmware.

Changes made in this patch:
- Renamed 'rsvd0' to 'rsvd4' to accurately represent the reserved bits
  starting at bit position 4.
- Removed the 'rsvd6' field, which was incorrectly defined and is not
  present in the hardware register layout.
- Adjusted the bit widths for 'ioxpgs' and 'mlpgs' to correctly reflect
  the number of bits these fields occupy in the hardware.
- Introduced a new 'rsvd15' field in both 'ace_pwrctl2' and
  'ace_pwrsts2' structures to account for the remaining reserved bits,
  ensuring the structure sizes accurately represent the full register
  width.

By correcting these bitfield definitions, the firmware's power
management code will now be consistent with the actual hardware design,
improving reliability and maintainability of the codebase.

Signed-off-by: Ievgen Ganakov <ievgen.ganakov@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This commit is contained in:
Ievgen Ganakov 2024-05-14 13:52:07 +02:00 committed by Anas Nashif
parent 4ba53a6325
commit d1b5d7092e
1 changed files with 8 additions and 7 deletions
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15
soc/intel/intel_adsp/ace/include/ace30_ptl/adsp_power.h
View File

@ -16,9 +16,8 @@
/* Power Control register - controls the power domain operations. */
struct ace_pwrctl {
uint16_t rsvd0 : 5;
uint16_t rsvd4 : 5;
uint16_t wphstpg : 1;
uint16_t rsvd6 : 1;
uint16_t wphubhppg : 1;
uint16_t wpdspulppg : 1;
uint16_t wpioxpg : 2;
@ -30,6 +29,7 @@ struct ace_pwrctl {
struct ace_pwrctl2 {
uint16_t wpdsphpxpg : 5;
uint16_t rsvd15 : 11;
};
#define ACE_PWRCTL ((volatile struct ace_pwrctl *) &ACE_DfPMCCU.dfpwrctl)
@ -37,19 +37,20 @@ struct ace_pwrctl2 {
/* Power Status register - reports the power domain status. */
struct ace_pwrsts {
uint16_t rsvd0 : 5;
uint16_t rsvd4 : 5;
uint16_t hstpgs : 1;
uint16_t rsvd6 : 1;
uint16_t hubhppgs : 1;
uint16_t dspulppgs : 1;
uint16_t ioxpgs : 4;
uint16_t mlpgs : 2;
uint16_t rsvd14 : 1;
uint16_t ioxpgs : 2;
uint16_t rsvd11 : 2;
uint16_t mlpgs : 1;
uint16_t rsvd14 : 2;
uint16_t hubulppgs : 1;
};
struct ace_pwrsts2 {
uint16_t dsphpxpgs : 5;
uint16_t rsvd15 : 11;
};
#define ACE_PWRSTS ((volatile struct ace_pwrsts *) &ACE_DfPMCCU.dfpwrsts)