boards: update stm32h747i_disco display
This update stm32h747i_disco board display config to use ltdc frame buffer config feature. For lvgl, by default ltdc frame buffer number set to 0. Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
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#
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# Copyright 2023 BrainCo Inc.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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# Add custom linker section to relocate framebuffers to PSRAM
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zephyr_linker_sources_ifdef(CONFIG_LV_Z_VBD_CUSTOM_SECTION
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SECTIONS dc_ram.ld)
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/*
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* Copyright (c) 2023 BrainCo Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram2), okay)
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GROUP_START(SDRAM2)
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SECTION_PROLOGUE(_STM32_SDRAM2_SECTION_NAME, (NOLOAD),)
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{
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*(.lvgl_buf)
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} GROUP_LINK_IN(SDRAM2)
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GROUP_END(SDRAM2)
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#endif
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# Copyright (c) 2023 BrainCo Inc.
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# SPDX-License-Identifier: Apache-2.0
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if SHIELD_ST_B_LCD40_DSI1_MB1166
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# Double frame buffer maintained by lvgl.
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if LVGL
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config STM32_LTDC_FB_NUM
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default 0
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config INPUT
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default y
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config LV_Z_VDB_SIZE
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default 100
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config LV_Z_DOUBLE_VDB
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default y
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config LV_Z_VBD_CUSTOM_SECTION
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default y
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config LV_Z_FULL_REFRESH
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default y
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config LV_Z_BITS_PER_PIXEL
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default 32
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config LV_DPI_DEF
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default 128
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config LV_Z_FLUSH_THREAD
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default y
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choice LV_COLOR_DEPTH
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default LV_COLOR_DEPTH_32
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endchoice
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endif # LVGL
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endif # SHIELD_ST_B_LCD40_DSI1_MB1166
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@ -7,11 +7,22 @@
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#include <zephyr/dt-bindings/display/panel.h>
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/ {
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lvgl_pointer {
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compatible = "zephyr,lvgl-pointer-input";
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input = <&ft5336>;
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invert-y;
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};
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chosen {
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zephyr,display = <dc;
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};
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};
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&sdram2 {
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/* Frame buffer memory cache will cause screen flickering. */
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
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};
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<dc {
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status = "okay";
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ext-sdram = <&sdram2>;
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@ -72,3 +83,15 @@
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pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
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rotation = <90>;
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};
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&i2c4 {
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pinctrl-0 = <&i2c4_scl_pd12 &i2c4_sda_pd13>;
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pinctrl-names = "default";
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clock-frequency = <I2C_BITRATE_FAST>;
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status = "okay";
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ft5336: ft5336@38 {
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compatible = "focaltech,ft5336";
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reg = <0x38>;
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};
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};
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