From ba263da94e0172326a7d59288ad0f2ba5529310a Mon Sep 17 00:00:00 2001 From: Jimmy Zheng Date: Fri, 5 Jul 2024 10:11:32 +0800 Subject: [PATCH] arch: riscv: fix exception_depth with RISCV_ALWAYS_SWITCH_THROUGH_ECALL When 'arch_switch()' switches though Ecall, 'exception_depth' is incorrectly added to the next thread because the current thread is updated before arch_switch(). Add 'exception_depth' back to the previous thread when Ecall is called from 'arch_switch()'. Signed-off-by: Jimmy Zheng --- arch/riscv/core/isr.S | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/riscv/core/isr.S b/arch/riscv/core/isr.S index 8a829fd66b1..da2068ed43d 100644 --- a/arch/riscv/core/isr.S +++ b/arch/riscv/core/isr.S @@ -398,6 +398,22 @@ is_kernel_syscall: bne t0, t1, skip_schedule lr a0, __struct_arch_esf_a0_OFFSET(sp) lr a1, __struct_arch_esf_a1_OFFSET(sp) + +#ifdef CONFIG_FPU_SHARING + /* + * When an ECALL is used for a context-switch, the current thread has + * been updated to the next thread. + * Add the exception_depth back to the previous thread. + */ + lb t1, _thread_offset_to_exception_depth(a0) + add t1, t1, -1 + sb t1, _thread_offset_to_exception_depth(a0) + + lb t1, _thread_offset_to_exception_depth(a1) + add t1, t1, 1 + sb t1, _thread_offset_to_exception_depth(a1) +#endif + j reschedule skip_schedule: #endif