diff --git a/arch/arc/core/arc_smp.c b/arch/arc/core/arc_smp.c index be88f6150a7..5b39817f9bf 100644 --- a/arch/arc/core/arc_smp.c +++ b/arch/arc/core/arc_smp.c @@ -13,16 +13,8 @@ #include #include #include -#include #include - -#ifndef IRQ_ICI -#define IRQ_ICI 19 -#endif - -#define ARCV2_ICI_IRQ_PRIORITY 1 - #define MP_PRIMARY_CPU_ID 0 volatile struct { @@ -112,8 +104,9 @@ void z_arc_slave_start(int cpu_num) z_irq_setup(); z_arc_connect_ici_clear(); - z_irq_priority_set(IRQ_ICI, ARCV2_ICI_IRQ_PRIORITY, 0); - irq_enable(IRQ_ICI); + z_irq_priority_set(DT_IRQN(DT_NODELABEL(ici)), + DT_IRQ(DT_NODELABEL(ici), priority), 0); + irq_enable(DT_IRQN(DT_NODELABEL(ici))); #endif /* call the function set by arch_start_cpu */ fn = arc_cpu_init[cpu_num].fn; @@ -162,10 +155,11 @@ static int arc_smp_init(const struct device *dev) if (bcr.ipi) { /* register ici interrupt, just need master core to register once */ z_arc_connect_ici_clear(); - IRQ_CONNECT(IRQ_ICI, ARCV2_ICI_IRQ_PRIORITY, - sched_ipi_handler, NULL, 0); + IRQ_CONNECT(DT_IRQN(DT_NODELABEL(ici)), + DT_IRQ(DT_NODELABEL(ici), priority), + sched_ipi_handler, NULL, 0); - irq_enable(IRQ_ICI); + irq_enable(DT_IRQN(DT_NODELABEL(ici))); } else { __ASSERT(0, "ARC connect has no inter-core interrupt\n"); diff --git a/boards/arc/nsim/nsim-smp.dtsi b/boards/arc/nsim/nsim-smp.dtsi new file mode 100644 index 00000000000..5a2eb307bad --- /dev/null +++ b/boards/arc/nsim/nsim-smp.dtsi @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2022 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nsim.dtsi" + +/ { + ici: intercore-interrupt-unit { + compatible = "snps,archs-ici"; + interrupts = <19 1>; + interrupt-parent = <&intc>; + }; +}; diff --git a/boards/arc/nsim/nsim_hs5x_smp.dts b/boards/arc/nsim/nsim_hs5x_smp.dts index adae0b6dd28..1a4a20ff3b4 100644 --- a/boards/arc/nsim/nsim_hs5x_smp.dts +++ b/boards/arc/nsim/nsim_hs5x_smp.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "nsim.dtsi" +#include "nsim-smp.dtsi" #include "nsim-flat-mem.dtsi" / { diff --git a/boards/arc/nsim/nsim_hs6x_smp.dts b/boards/arc/nsim/nsim_hs6x_smp.dts index a5ca7f9553a..945396e8498 100644 --- a/boards/arc/nsim/nsim_hs6x_smp.dts +++ b/boards/arc/nsim/nsim_hs6x_smp.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "nsim.dtsi" +#include "nsim-smp.dtsi" #include "nsim-flat-mem.dtsi" / { diff --git a/boards/arc/nsim/nsim_hs_smp.dts b/boards/arc/nsim/nsim_hs_smp.dts index 4ec20da3b1d..c827dd32c18 100644 --- a/boards/arc/nsim/nsim_hs_smp.dts +++ b/boards/arc/nsim/nsim_hs_smp.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "nsim.dtsi" +#include "nsim-smp.dtsi" #include "nsim-flat-mem.dtsi" / { diff --git a/dts/arc/synopsys/arc_hsdk.dtsi b/dts/arc/synopsys/arc_hsdk.dtsi index fc29fd7c1d1..d7bca66bcc5 100644 --- a/dts/arc/synopsys/arc_hsdk.dtsi +++ b/dts/arc/synopsys/arc_hsdk.dtsi @@ -54,6 +54,12 @@ interrupt-parent = <&intc>; }; + ici: intercore-interrupt-unit { + compatible = "snps,archs-ici"; + interrupts = <19 1>; + interrupt-parent = <&intc>; + }; + timer0: timer0 { compatible = "snps,arc-timer"; interrupts = <16 1>; diff --git a/dts/bindings/misc/snps,archs-ici.yaml b/dts/bindings/misc/snps,archs-ici.yaml new file mode 100644 index 00000000000..4f5b7cc3820 --- /dev/null +++ b/dts/bindings/misc/snps,archs-ici.yaml @@ -0,0 +1,8 @@ +# Copyright (c) 2022 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: Inter-Core Interrupt Unit (ICI) + +compatible: "snps,archs-ici" + +include: base.yaml diff --git a/soc/arc/snps_arc_hsdk/soc.h b/soc/arc/snps_arc_hsdk/soc.h index 34da96ef486..fa44abe0db4 100644 --- a/soc/arc/snps_arc_hsdk/soc.h +++ b/soc/arc/snps_arc_hsdk/soc.h @@ -16,10 +16,6 @@ #include - -/* ARC HS Core IRQs */ -#define IRQ_ICI 19 - #ifndef _ASMLANGUAGE