From ab84989a12725d0ffa774da8cb244e9ff9aaa539 Mon Sep 17 00:00:00 2001 From: Filip Kokosinski Date: Wed, 3 Apr 2024 11:00:17 +0200 Subject: [PATCH] arch/riscv: remove the `Kconfig.core` file This commit removes the `Kconfig.core` file. It's been largely unused, and the only symbol it provides (`RISCV_CORE_E31`) overlaps with the SoC-layer provided `SOC_SERIES_SIFIVE_FREEDOM_FE300`. As of date, the only SoC that uses the E31 core in Zephyr is the FE310 SoC. Signed-off-by: Filip Kokosinski --- arch/riscv/Kconfig | 1 - arch/riscv/Kconfig.core | 18 ------------------ .../riscv32_xip/qemu_riscv32_xip_defconfig | 1 - boards/sifive/hifive1/Kconfig | 5 ----- soc/sifive/sifive_freedom/fe300/Kconfig | 3 +++ 5 files changed, 3 insertions(+), 25 deletions(-) delete mode 100644 arch/riscv/Kconfig.core delete mode 100644 boards/sifive/hifive1/Kconfig diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 9f2d24977a9..66c96cddda9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -374,6 +374,5 @@ config ARCH_HAS_SINGLE_THREAD_SUPPORT default y if !SMP rsource "Kconfig.isa" -rsource "Kconfig.core" endmenu diff --git a/arch/riscv/Kconfig.core b/arch/riscv/Kconfig.core deleted file mode 100644 index a036db5f04d..00000000000 --- a/arch/riscv/Kconfig.core +++ /dev/null @@ -1,18 +0,0 @@ -# Copyright (c) 2022 Carlo Caione -# SPDX-License-Identifier: Apache-2.0 - -menu "RISCV core" - -config RISCV_CORE_E31 - bool "E31 core" - select RISCV_PMP - select RISCV_ISA_RV32I - select RISCV_ISA_EXT_M - select RISCV_ISA_EXT_A - select RISCV_ISA_EXT_C - select RISCV_ISA_EXT_ZICSR - select RISCV_ISA_EXT_ZIFENCEI - help - SiFive E31 Standard Core - -endmenu diff --git a/boards/qemu/riscv32_xip/qemu_riscv32_xip_defconfig b/boards/qemu/riscv32_xip/qemu_riscv32_xip_defconfig index f9bc269d13f..578726a799f 100644 --- a/boards/qemu/riscv32_xip/qemu_riscv32_xip_defconfig +++ b/boards/qemu/riscv32_xip/qemu_riscv32_xip_defconfig @@ -8,4 +8,3 @@ CONFIG_PINCTRL=y CONFIG_GPIO=y CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000 CONFIG_QEMU_ICOUNT_SHIFT=6 -CONFIG_RISCV_CORE_E31=y diff --git a/boards/sifive/hifive1/Kconfig b/boards/sifive/hifive1/Kconfig deleted file mode 100644 index 34402f96d73..00000000000 --- a/boards/sifive/hifive1/Kconfig +++ /dev/null @@ -1,5 +0,0 @@ -# Copyright (c) 2024 Antmicro -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_HIFIVE1 - select RISCV_CORE_E31 diff --git a/soc/sifive/sifive_freedom/fe300/Kconfig b/soc/sifive/sifive_freedom/fe300/Kconfig index e5796d7c9dc..cde775ade0f 100644 --- a/soc/sifive/sifive_freedom/fe300/Kconfig +++ b/soc/sifive/sifive_freedom/fe300/Kconfig @@ -9,9 +9,12 @@ config SOC_SERIES_SIFIVE_FREEDOM_FE300 select RISCV select RISCV_PRIVILEGED select RISCV_HAS_PLIC + select RISCV_PMP + select RISCV_ISA_RV32I select RISCV_ISA_EXT_M select RISCV_ISA_EXT_A + select RISCV_ISA_EXT_C select RISCV_ISA_EXT_ZICSR select RISCV_ISA_EXT_ZIFENCEI