From 958a4505bd158a7bbb3390344e00e2ed743bef58 Mon Sep 17 00:00:00 2001 From: Hess Nathan Date: Tue, 30 Apr 2024 09:52:26 +0200 Subject: [PATCH] coding guidelines: comply with MISRA Rule 12.1. -added parentheses verifying lack of ambiguities Signed-off-by: Hess Nathan --- drivers/pcie/host/pcie.c | 14 +++++++------- drivers/serial/uart_ns16550.c | 24 ++++++++++++------------ drivers/timer/apic_tsc.c | 4 ++-- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/pcie/host/pcie.c b/drivers/pcie/host/pcie.c index 0a98d8e8e06..9acca131a98 100644 --- a/drivers/pcie/host/pcie.c +++ b/drivers/pcie/host/pcie.c @@ -179,8 +179,8 @@ static bool pcie_get_bar(pcie_bdf_t bdf, reg++; phys_addr |= ((uint64_t)pcie_conf_read(bdf, reg)) << 32; - if (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL64 || - PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE) { + if ((PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL64) || + (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE)) { /* Discard on invalid address */ goto err_exit; } @@ -188,8 +188,8 @@ static bool pcie_get_bar(pcie_bdf_t bdf, pcie_conf_write(bdf, reg, 0xFFFFFFFFU); size |= ((uint64_t)pcie_conf_read(bdf, reg)) << 32; pcie_conf_write(bdf, reg, (uint32_t)((uint64_t)phys_addr >> 32)); - } else if (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL || - PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE) { + } else if ((PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL) || + (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE)) { /* Discard on invalid address */ goto err_exit; } @@ -253,7 +253,7 @@ static bool pcie_probe_bar(pcie_bdf_t bdf, uint32_t reg; for (reg = PCIE_CONF_BAR0; - index > 0 && reg <= PCIE_CONF_BAR5; reg++, index--) { + (index > 0) && (reg <= PCIE_CONF_BAR5); reg++, index--) { uintptr_t addr = pcie_conf_read(bdf, reg); if (PCIE_CONF_BAR_MEM(addr) && PCIE_CONF_BAR_64(addr)) { @@ -306,8 +306,8 @@ unsigned int pcie_alloc_irq(pcie_bdf_t bdf) data = pcie_conf_read(bdf, PCIE_CONF_INTR); irq = PCIE_CONF_INTR_IRQ(data); - if (irq == PCIE_CONF_INTR_IRQ_NONE || - irq >= CONFIG_MAX_IRQ_LINES || + if ((irq == PCIE_CONF_INTR_IRQ_NONE) || + (irq >= CONFIG_MAX_IRQ_LINES) || arch_irq_is_used(irq)) { /* In some platforms, PCI interrupts are hardwired to specific interrupt inputs diff --git a/drivers/serial/uart_ns16550.c b/drivers/serial/uart_ns16550.c index 9b98ce8c52e..a9515d8c7a5 100644 --- a/drivers/serial/uart_ns16550.c +++ b/drivers/serial/uart_ns16550.c @@ -242,18 +242,18 @@ BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE"); #define MSR_RI 0x40 /* complement of ring signal */ #define MSR_DCD 0x80 /* complement of dcd */ -#define THR(dev) (get_port(dev) + REG_THR * reg_interval(dev)) -#define RDR(dev) (get_port(dev) + REG_RDR * reg_interval(dev)) -#define BRDL(dev) (get_port(dev) + REG_BRDL * reg_interval(dev)) -#define BRDH(dev) (get_port(dev) + REG_BRDH * reg_interval(dev)) -#define IER(dev) (get_port(dev) + REG_IER * reg_interval(dev)) -#define IIR(dev) (get_port(dev) + REG_IIR * reg_interval(dev)) -#define FCR(dev) (get_port(dev) + REG_FCR * reg_interval(dev)) -#define LCR(dev) (get_port(dev) + REG_LCR * reg_interval(dev)) -#define MDC(dev) (get_port(dev) + REG_MDC * reg_interval(dev)) -#define LSR(dev) (get_port(dev) + REG_LSR * reg_interval(dev)) -#define MSR(dev) (get_port(dev) + REG_MSR * reg_interval(dev)) -#define MDR1(dev) (get_port(dev) + REG_MDR1 * reg_interval(dev)) +#define THR(dev) (get_port(dev) + (REG_THR * reg_interval(dev))) +#define RDR(dev) (get_port(dev) + (REG_RDR * reg_interval(dev))) +#define BRDL(dev) (get_port(dev) + (REG_BRDL * reg_interval(dev))) +#define BRDH(dev) (get_port(dev) + (REG_BRDH * reg_interval(dev))) +#define IER(dev) (get_port(dev) + (REG_IER * reg_interval(dev))) +#define IIR(dev) (get_port(dev) + (REG_IIR * reg_interval(dev))) +#define FCR(dev) (get_port(dev) + (REG_FCR * reg_interval(dev))) +#define LCR(dev) (get_port(dev) + (REG_LCR * reg_interval(dev))) +#define MDC(dev) (get_port(dev) + (REG_MDC * reg_interval(dev))) +#define LSR(dev) (get_port(dev) + (REG_LSR * reg_interval(dev))) +#define MSR(dev) (get_port(dev) + (REG_MSR * reg_interval(dev))) +#define MDR1(dev) (get_port(dev) + (REG_MDR1 * reg_interval(dev))) #define DLF(dev) (get_port(dev) + REG_DLF) #define PCP(dev) (get_port(dev) + REG_PCP) diff --git a/drivers/timer/apic_tsc.c b/drivers/timer/apic_tsc.c index 59b0017375c..6b4035d976d 100644 --- a/drivers/timer/apic_tsc.c +++ b/drivers/timer/apic_tsc.c @@ -64,7 +64,7 @@ void sys_clock_set_timeout(int32_t ticks, bool idle) uint64_t now = rdtsc(); k_spinlock_key_t key = k_spin_lock(&lock); - uint64_t expires = now + MAX(ticks - 1, 0) * CYC_PER_TICK; + uint64_t expires = now + (MAX(ticks - 1, 0) * CYC_PER_TICK); expires = last_announce + (((expires - last_announce + CYC_PER_TICK - 1) / CYC_PER_TICK) * CYC_PER_TICK); @@ -77,7 +77,7 @@ void sys_clock_set_timeout(int32_t ticks, bool idle) * real hardware it requires more than a century of uptime, * but this is cheap and safe. */ - if (ticks == K_TICKS_FOREVER || expires < last_announce) { + if ((ticks == K_TICKS_FOREVER) || (expires < last_announce)) { expires = UINT64_MAX; }