diff --git a/boards/nios2/altera_max10/altera_max10.dts b/boards/nios2/altera_max10/altera_max10.dts
index 55efcf6a660..9b258bda273 100644
--- a/boards/nios2/altera_max10/altera_max10.dts
+++ b/boards/nios2/altera_max10/altera_max10.dts
@@ -2,6 +2,7 @@
 
 /dts-v1/;
 
+#include <mem.h>
 #include <intel/nios2f.dtsi>
 
 / {
@@ -29,3 +30,12 @@
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_ULTRA>;
 };
+
+&qspi {
+	status = "okay";
+	n25q512ax3: n25q512ax3@0 {
+		compatible = "altr,nios2-qspi-nor";
+		size = <DT_SIZE_M(64*8)>;	/* in bits */
+		reg = <0>;
+	};
+};
diff --git a/dts/bindings/flash_controller/altr,nios2-qspi-nor.yaml b/dts/bindings/flash_controller/altr,nios2-qspi-nor.yaml
new file mode 100644
index 00000000000..31a1b4bfa76
--- /dev/null
+++ b/dts/bindings/flash_controller/altr,nios2-qspi-nor.yaml
@@ -0,0 +1,17 @@
+# Copyright (c) 2020, Linaro limited
+# SPDX-License-Identifier: Apache-2.0
+
+description: Altera NIOS2 QSPI Flash controller supporting the JEDEC CFI interface
+
+compatible: "altr,nios2-qspi-nor"
+
+include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
+
+on-bus: qspi
+
+properties:
+    reg:
+      required: true
+    size:
+      required: true
+      description: Flash Memory size in bits
diff --git a/dts/bindings/qspi/altr,nios2-qspi.yaml b/dts/bindings/qspi/altr,nios2-qspi.yaml
new file mode 100644
index 00000000000..48cfe6deef2
--- /dev/null
+++ b/dts/bindings/qspi/altr,nios2-qspi.yaml
@@ -0,0 +1,14 @@
+# Copyright (c) 2022, Kumar Gala <galak@kernel.org>
+# SPDX-License-Identifier: Apache-2.0
+
+description: Altera NIOS2 QSPI
+
+compatible: "altr,nios2-qspi"
+
+include: [base.yaml]
+
+bus: qspi
+
+properties:
+    reg:
+      required: true
diff --git a/dts/nios2/intel/nios2f.dtsi b/dts/nios2/intel/nios2f.dtsi
index ac193a67288..955d6663125 100644
--- a/dts/nios2/intel/nios2f.dtsi
+++ b/dts/nios2/intel/nios2f.dtsi
@@ -65,5 +65,15 @@
 			interrupts = <3 3>;
 			#dma-cells = <0>;
 		};
+
+
+		qspi: qspi@100240 {
+			compatible = "altr,nios2-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x100240 0x40>, <0x8000000 0x4000000>;
+			reg-names = "qspi", "qspi_mm";
+			status = "disabled";
+		};
 	};
 };