drivers: counter: add NXP Kinetis LPTMR driver
Add counter driver for the NXP Kinetis Low Power Timer (LPTMR). The driver can be configured either as 16 bit counter or 16 bit pulse counter. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
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@ -14,4 +14,5 @@ zephyr_library_sources_ifdef(CONFIG_COUNTER_SAM0_TC32 counter_sam0_tc3
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zephyr_library_sources_ifdef(CONFIG_COUNTER_CMOS counter_cmos.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_GPT counter_mcux_gpt.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_XEC counter_mchp_xec.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_LPTMR counter_mcux_lptmr.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE counter_handlers.c)
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@ -36,4 +36,6 @@ source "drivers/counter/Kconfig.mcux_gpt"
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source "drivers/counter/Kconfig.xec"
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source "drivers/counter/Kconfig.mcux_lptmr"
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endif # COUNTER
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@ -0,0 +1,10 @@
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# MCUXpresso SDK Low Power Timer (LPTMR)
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# Copyright (c) 2020 Vestas Wind Systems A/S
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# SPDX-License-Identifier: Apache-2.0
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config COUNTER_MCUX_LPTMR
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bool "MCUX LPTMR driver"
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depends on HAS_MCUX_LPTMR
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help
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Enable support for the MCUX Low Power Timer (LPTMR).
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@ -0,0 +1,250 @@
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/*
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* Copyright (c) 2020 Vestas Wind Systems A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_kinetis_lptmr
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#include <drivers/counter.h>
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#include <fsl_lptmr.h>
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struct mcux_lptmr_config {
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struct counter_config_info info;
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LPTMR_Type *base;
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lptmr_prescaler_clock_select_t clk_source;
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lptmr_prescaler_glitch_value_t prescaler_glitch;
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bool bypass_prescaler_glitch;
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lptmr_timer_mode_t mode;
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lptmr_pin_select_t pin;
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lptmr_pin_polarity_t polarity;
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void (*irq_config_func)(struct device *dev);
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};
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struct mcux_lptmr_data {
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counter_top_callback_t top_callback;
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void *top_user_data;
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};
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static int mcux_lptmr_start(struct device *dev)
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{
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const struct mcux_lptmr_config *config = dev->config->config_info;
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LPTMR_EnableInterrupts(config->base,
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kLPTMR_TimerInterruptEnable);
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LPTMR_StartTimer(config->base);
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return 0;
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}
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static int mcux_lptmr_stop(struct device *dev)
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{
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const struct mcux_lptmr_config *config = dev->config->config_info;
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LPTMR_DisableInterrupts(config->base,
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kLPTMR_TimerInterruptEnable);
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LPTMR_StopTimer(config->base);
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return 0;
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}
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static int mcux_lptmr_get_value(struct device *dev, u32_t *ticks)
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{
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const struct mcux_lptmr_config *config = dev->config->config_info;
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*ticks = LPTMR_GetCurrentTimerCount(config->base);
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return 0;
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}
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static int mcux_lptmr_set_top_value(struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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const struct mcux_lptmr_config *config = dev->config->config_info;
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struct mcux_lptmr_data *data = dev->driver_data;
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if (cfg->ticks == 0) {
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return -EINVAL;
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}
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data->top_callback = cfg->callback;
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data->top_user_data = cfg->user_data;
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if (config->base->CSR & LPTMR_CSR_TEN_MASK) {
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/* Timer already enabled, check flags before resetting */
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if (cfg->flags & COUNTER_TOP_CFG_DONT_RESET) {
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return -ENOTSUP;
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}
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LPTMR_StopTimer(config->base);
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LPTMR_SetTimerPeriod(config->base, cfg->ticks);
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LPTMR_StartTimer(config->base);
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} else {
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LPTMR_SetTimerPeriod(config->base, cfg->ticks);
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}
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return 0;
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}
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static u32_t mcux_lptmr_get_pending_int(struct device *dev)
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{
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const struct mcux_lptmr_config *config = dev->config->config_info;
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u32_t mask = LPTMR_CSR_TCF_MASK | LPTMR_CSR_TIE_MASK;
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u32_t flags;
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flags = LPTMR_GetStatusFlags(config->base);
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return ((flags & mask) == mask);
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}
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static u32_t mcux_lptmr_get_top_value(struct device *dev)
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{
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const struct mcux_lptmr_config *config = dev->config->config_info;
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return (config->base->CMR & LPTMR_CMR_COMPARE_MASK) + 1U;
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}
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static u32_t mcux_lptmr_get_max_relative_alarm(struct device *dev)
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{
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ARG_UNUSED(dev);
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/* Alarms not supported */
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return 0;
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}
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static void mcux_lptmr_isr(void *arg)
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{
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struct device *dev = arg;
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const struct mcux_lptmr_config *config = dev->config->config_info;
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struct mcux_lptmr_data *data = dev->driver_data;
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u32_t flags;
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flags = LPTMR_GetStatusFlags(config->base);
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LPTMR_ClearStatusFlags(config->base, flags);
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if (data->top_callback) {
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data->top_callback(dev, data->top_user_data);
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}
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}
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static int mcux_lptmr_init(struct device *dev)
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{
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const struct mcux_lptmr_config *config = dev->config->config_info;
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lptmr_config_t lptmr_config;
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LPTMR_GetDefaultConfig(&lptmr_config);
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lptmr_config.timerMode = config->mode;
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lptmr_config.enableFreeRunning = false;
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lptmr_config.prescalerClockSource = config->clk_source;
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lptmr_config.bypassPrescaler = config->bypass_prescaler_glitch;
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lptmr_config.value = config->prescaler_glitch;
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if (config->mode == kLPTMR_TimerModePulseCounter) {
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lptmr_config.pinSelect = config->pin;
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lptmr_config.pinPolarity = config->polarity;
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}
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LPTMR_Init(config->base, &lptmr_config);
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config->irq_config_func(dev);
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return 0;
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}
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static const struct counter_driver_api mcux_lptmr_driver_api = {
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.start = mcux_lptmr_start,
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.stop = mcux_lptmr_stop,
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.get_value = mcux_lptmr_get_value,
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.set_top_value = mcux_lptmr_set_top_value,
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.get_pending_int = mcux_lptmr_get_pending_int,
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.get_top_value = mcux_lptmr_get_top_value,
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.get_max_relative_alarm = mcux_lptmr_get_max_relative_alarm,
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};
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#define TO_LPTMR_CLK_SEL(val) _DO_CONCAT(kLPTMR_PrescalerClock_, val)
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#define TO_LPTMR_PIN_SEL(val) _DO_CONCAT(kLPTMR_PinSelectInput_, val)
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/* Prescaler mapping */
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#define LPTMR_PRESCALER_2 kLPTMR_Prescale_Glitch_0
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#define LPTMR_PRESCALER_4 kLPTMR_Prescale_Glitch_1
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#define LPTMR_PRESCALER_8 kLPTMR_Prescale_Glitch_2
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#define LPTMR_PRESCALER_16 kLPTMR_Prescale_Glitch_3
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#define LPTMR_PRESCALER_32 kLPTMR_Prescale_Glitch_4
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#define LPTMR_PRESCALER_64 kLPTMR_Prescale_Glitch_5
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#define LPTMR_PRESCALER_128 kLPTMR_Prescale_Glitch_6
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#define LPTMR_PRESCALER_256 kLPTMR_Prescale_Glitch_7
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#define LPTMR_PRESCALER_512 kLPTMR_Prescale_Glitch_8
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#define LPTMR_PRESCALER_1024 kLPTMR_Prescale_Glitch_9
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#define LPTMR_PRESCALER_2048 kLPTMR_Prescale_Glitch_10
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#define LPTMR_PRESCALER_4096 kLPTMR_Prescale_Glitch_11
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#define LPTMR_PRESCALER_8192 kLPTMR_Prescale_Glitch_12
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#define LPTMR_PRESCALER_16384 kLPTMR_Prescale_Glitch_13
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#define LPTMR_PRESCALER_32768 kLPTMR_Prescale_Glitch_14
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#define LPTMR_PRESCALER_65536 kLPTMR_Prescale_Glitch_15
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#define TO_LPTMR_PRESCALER(val) _DO_CONCAT(LPTMR_PRESCALER_, val)
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/* Glitch filter mapping */
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#define LPTMR_GLITCH_2 kLPTMR_Prescale_Glitch_1
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#define LPTMR_GLITCH_4 kLPTMR_Prescale_Glitch_2
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#define LPTMR_GLITCH_8 kLPTMR_Prescale_Glitch_3
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#define LPTMR_GLITCH_16 kLPTMR_Prescale_Glitch_4
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#define LPTMR_GLITCH_32 kLPTMR_Prescale_Glitch_5
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#define LPTMR_GLITCH_64 kLPTMR_Prescale_Glitch_6
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#define LPTMR_GLITCH_128 kLPTMR_Prescale_Glitch_7
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#define LPTMR_GLITCH_256 kLPTMR_Prescale_Glitch_8
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#define LPTMR_GLITCH_512 kLPTMR_Prescale_Glitch_9
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#define LPTMR_GLITCH_1024 kLPTMR_Prescale_Glitch_10
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#define LPTMR_GLITCH_2048 kLPTMR_Prescale_Glitch_11
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#define LPTMR_GLITCH_4096 kLPTMR_Prescale_Glitch_12
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#define LPTMR_GLITCH_8192 kLPTMR_Prescale_Glitch_13
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#define LPTMR_GLITCH_16384 kLPTMR_Prescale_Glitch_14
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#define LPTMR_GLITCH_32768 kLPTMR_Prescale_Glitch_15
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#define TO_LPTMR_GLITCH(val) _DO_CONCAT(LPTMR_GLITCH_, val)
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#if DT_HAS_DRV_INST(0)
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static struct mcux_lptmr_data mcux_lptmr_data_0;
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static void mcux_lptmr_irq_config_0(struct device *dev);
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static struct mcux_lptmr_config mcux_lptmr_config_0 = {
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.info = {
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.max_top_value = UINT16_MAX,
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.freq = DT_INST_PROP(0, clock_frequency) /
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DT_INST_PROP(0, prescaler),
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.flags = COUNTER_CONFIG_INFO_COUNT_UP,
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.channels = 0,
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},
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.base = (LPTMR_Type *)DT_INST_REG_ADDR(0),
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.clk_source = TO_LPTMR_CLK_SEL(DT_INST_PROP(0, clk_source)),
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#if DT_INST_NODE_HAS_PROP(0, input_pin)
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#if DT_INST_PROP(0, prescaler) == 1
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.bypass_prescaler_glitch = true,
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#else
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.prescaler_glitch = TO_LPTMR_GLITCH(DT_INST_PROP(0, prescaler)),
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#endif
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.mode = kLPTMR_TimerModePulseCounter,
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.pin = TO_LPTMR_PIN_SEL(DT_INST_PROP(0, input_pin)),
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.polarity = DT_INST_PROP(0, active_low),
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#else /* !DT_INST_NODE_HAS_PROP(0, input_pin) */
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.mode = kLPTMR_TimerModeTimeCounter,
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#if DT_INST_PROP(0, prescaler) == 1
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.bypass_prescaler_glitch = true,
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#else
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.prescaler_glitch = TO_LPTMR_PRESCALER(DT_INST_PROP(0, prescaler)),
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#endif
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#endif /* !DT_INST_NODE_HAS_PROP(0, input_pin) */
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.irq_config_func = mcux_lptmr_irq_config_0,
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};
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DEVICE_AND_API_INIT(mcux_lptmr_0, DT_INST_LABEL(0),
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&mcux_lptmr_init, &mcux_lptmr_data_0,
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&mcux_lptmr_config_0,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_lptmr_driver_api);
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static void mcux_lptmr_irq_config_0(struct device *dev)
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{
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IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
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mcux_lptmr_isr, DEVICE_GET(mcux_lptmr_0), 0);
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irq_enable(DT_INST_IRQN(0));
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}
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#endif /* DT_HAS_DRV_INST(0) */
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