From 85c292ac59defed43093234aff7610ab5434b4b0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Karol=20Laso=C5=84czyk?= Date: Fri, 16 Aug 2024 12:21:45 +0200 Subject: [PATCH] soc: nordic: Move DCDC configuration to DT for nRF54L15 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Moving configuration for nRF54L15 device from kconfig to dts. Signed-off-by: Karol Lasończyk --- boards/nordic/nrf54l15pdk/Kconfig | 13 ------------- .../nrf54l15pdk/nrf54l15_cpuapp_common.dtsi | 9 +++++++++ .../regulator/nordic,nrf54l-regulators.yaml | 12 ++++++++++++ dts/common/nordic/nrf54l15.dtsi | 17 +++++++++++++++++ soc/nordic/nrf54l/Kconfig | 5 ----- soc/nordic/nrf54l/soc.c | 6 +++--- 6 files changed, 41 insertions(+), 21 deletions(-) delete mode 100644 boards/nordic/nrf54l15pdk/Kconfig create mode 100644 dts/bindings/regulator/nordic,nrf54l-regulators.yaml diff --git a/boards/nordic/nrf54l15pdk/Kconfig b/boards/nordic/nrf54l15pdk/Kconfig deleted file mode 100644 index 638ce57499d..00000000000 --- a/boards/nordic/nrf54l15pdk/Kconfig +++ /dev/null @@ -1,13 +0,0 @@ -# nRF54L15 PDK board configuration - -# Copyright (c) 2024 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NRF54L15PDK_NRF54L15_CPUAPP - -config BOARD_ENABLE_DCDC - bool "DCDC mode" - select SOC_NRF54L_VREG_MAIN_DCDC - default y - -endif # BOARD_NRF54L15PDK_NRF54L15_CPUAPP diff --git a/boards/nordic/nrf54l15pdk/nrf54l15_cpuapp_common.dtsi b/boards/nordic/nrf54l15pdk/nrf54l15_cpuapp_common.dtsi index 2938f33f226..2cfc84500be 100644 --- a/boards/nordic/nrf54l15pdk/nrf54l15_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l15pdk/nrf54l15_cpuapp_common.dtsi @@ -36,6 +36,15 @@ load-capacitance-femtofarad = <15000>; }; +®ulators { + status = "okay"; +}; + +&vregmain { + status = "okay"; + regulator-initial-mode = ; +}; + &grtc { owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>; /* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */ diff --git a/dts/bindings/regulator/nordic,nrf54l-regulators.yaml b/dts/bindings/regulator/nordic,nrf54l-regulators.yaml new file mode 100644 index 00000000000..03ca0d946b2 --- /dev/null +++ b/dts/bindings/regulator/nordic,nrf54l-regulators.yaml @@ -0,0 +1,12 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: Nordic REGULATORS (voltage regulators control module) on nRF54L. + +compatible: "nordic,nrf54l-regulators" + +include: base.yaml + +properties: + reg: + required: true diff --git a/dts/common/nordic/nrf54l15.dtsi b/dts/common/nordic/nrf54l15.dtsi index df0a52639bb..8e0a741d661 100644 --- a/dts/common/nordic/nrf54l15.dtsi +++ b/dts/common/nordic/nrf54l15.dtsi @@ -6,6 +6,7 @@ #include #include +#include /delete-node/ &sw_pwm; @@ -577,6 +578,22 @@ interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; status = "disabled"; }; + + regulators: regulator@120000 { + compatible = "nordic,nrf54l-regulators"; + reg = <0x120000 0x1000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + + vregmain: regulator@120600 { + compatible = "nordic,nrf5x-regulator"; + reg = <0x120600 0x1>; + status = "disabled"; + regulator-name = "VREGMAIN"; + regulator-initial-mode = ; + }; + }; }; rram_controller: rram-controller@5004b000 { diff --git a/soc/nordic/nrf54l/Kconfig b/soc/nordic/nrf54l/Kconfig index 18e315078e9..d1671badd6a 100644 --- a/soc/nordic/nrf54l/Kconfig +++ b/soc/nordic/nrf54l/Kconfig @@ -54,11 +54,6 @@ config SOC_NRF_FORCE_CONSTLAT of base resources on while in sleep. The advantage of having a constant and predictable latency will be at the cost of having increased power consumption. -config SOC_NRF54L_VREG_MAIN_DCDC - bool "NRF54L DC/DC converter." - help - To enable, an inductor must be connected to the DC/DC converter pin. - config SOC_NRF54L_NORMAL_VOLTAGE_MODE bool "NRF54L Normal Voltage Mode." diff --git a/soc/nordic/nrf54l/soc.c b/soc/nordic/nrf54l/soc.c index 713e4e474d5..5b593b271b4 100644 --- a/soc/nordic/nrf54l/soc.c +++ b/soc/nordic/nrf54l/soc.c @@ -149,9 +149,9 @@ static int nordicsemi_nrf54l_init(void) nrf_power_task_trigger(NRF_POWER, NRF_POWER_TASK_CONSTLAT); } - if (IS_ENABLED(CONFIG_SOC_NRF54L_VREG_MAIN_DCDC)) { - nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_MAIN, true); - } +#if (DT_PROP(DT_NODELABEL(vregmain), regulator_initial_mode) == NRF5X_REG_MODE_DCDC) + nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_MAIN, true); +#endif if (IS_ENABLED(CONFIG_SOC_NRF54L_NORMAL_VOLTAGE_MODE)) { nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_MEDIUM, false);