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clock: stm32f4: Add some missing clocks 

Add several missing clocks that are used by other members of the STM32F4
family. This is needed to add support for various hardware, like UART9
and UART10 on STM32F413.

Change-Id: I6f1a04ddece90a04e31a1710065545179b0e530d
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This commit is contained in:
Florian Vaussard 2016-12-08 11:54:09 +01:00 committed by Kumar Gala
parent 2304e0facf
commit 85b4ecabe8
1 changed files with 20 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
include/drivers/clock_control/stm32f4_clock_control.h
View File

@ -17,6 +17,7 @@
enum {
STM32F4X_CLOCK_BUS_AHB1,
STM32F4X_CLOCK_BUS_AHB2,
STM32F4X_CLOCK_BUS_AHB3,
STM32F4X_CLOCK_BUS_APB1,
STM32F4X_CLOCK_BUS_APB2,
};
@ -40,6 +41,7 @@ enum {
STM32F4X_CLOCK_ENABLE_CCMDATARAM = 1 << 20,
STM32F4X_CLOCK_ENABLE_DMA1 = 1 << 21,
STM32F4X_CLOCK_ENABLE_DMA2 = 1 << 22,
STM32F4X_CLOCK_ENABLE_DMA2D = 1 << 23,
STM32F4X_CLOCK_ENABLE_ETHMAC = 1 << 25,
STM32F4X_CLOCK_ENABLE_ETHMACTX = 1 << 26,
STM32F4X_CLOCK_ENABLE_ETHMACRX = 1 << 27,
@ -57,6 +59,12 @@ enum {
STM32F4X_CLOCK_ENABLE_OTGFS = 1 << 7,
};
/* AHB3 pins */
enum {
STM32F4X_CLOCK_ENABLE_FSMC = 1 << 0,
STM32F4X_CLOCK_ENABLE_QSPI = 1 << 1,
};
/* APB1 pins */
enum {
STM32F4X_CLOCK_ENABLE_TIM2 = 1 << 0,
@ -68,6 +76,8 @@ enum {
STM32F4X_CLOCK_ENABLE_TIM12 = 1 << 6,
STM32F4X_CLOCK_ENABLE_TIM13 = 1 << 7,
STM32F4X_CLOCK_ENABLE_TIM14 = 1 << 8,
STM32F4X_CLOCK_ENABLE_LPTIMER1 = 1 << 9,
STM32F4X_CLOCK_ENABLE_RTCAPB = 1 << 10,
STM32F4X_CLOCK_ENABLE_WWDG = 1 << 11,
STM32F4X_CLOCK_ENABLE_SPI2 = 1 << 14,
STM32F4X_CLOCK_ENABLE_SPI3 = 1 << 15,
@ -78,8 +88,10 @@ enum {
STM32F4X_CLOCK_ENABLE_I2C1 = 1 << 21,
STM32F4X_CLOCK_ENABLE_I2C2 = 1 << 22,
STM32F4X_CLOCK_ENABLE_I2C3 = 1 << 23,
STM32F4X_CLOCK_ENABLE_I2CFMP1 = 1 << 24,
STM32F4X_CLOCK_ENABLE_CAN1 = 1 << 25,
STM32F4X_CLOCK_ENABLE_CAN2 = 1 << 26,
STM32F4X_CLOCK_ENABLE_CAN3 = 1 << 27,
STM32F4X_CLOCK_ENABLE_PWR = 1 << 28,
STM32F4X_CLOCK_ENABLE_DAC = 1 << 29,
STM32F4X_CLOCK_ENABLE_UART7 = 1 << 30,
@ -92,17 +104,24 @@ enum {
STM32F4X_CLOCK_ENABLE_TIM8 = 1 << 1,
STM32F4X_CLOCK_ENABLE_USART1 = 1 << 4,
STM32F4X_CLOCK_ENABLE_USART6 = 1 << 5,
STM32F4X_CLOCK_ENABLE_ADC = 1 << 8,
STM32F4X_CLOCK_ENABLE_UART9 = 1 << 6,
STM32F4X_CLOCK_ENABLE_UART10 = 1 << 7,
STM32F4X_CLOCK_ENABLE_ADC1 = 1 << 8,
STM32F4X_CLOCK_ENABLE_ADC2 = 1 << 9,
STM32F4X_CLOCK_ENABLE_ADC3 = 1 << 10,
STM32F4X_CLOCK_ENABLE_SDIO = 1 << 11,
STM32F4X_CLOCK_ENABLE_SPI1 = 1 << 12,
STM32F4X_CLOCK_ENABLE_SPI4 = 1 << 13,
STM32F4X_CLOCK_ENABLE_SYSCFG = 1 << 14,
STM32F4X_CLOCK_ENABLE_EXTIT = 1 << 15,
STM32F4X_CLOCK_ENABLE_TIM9 = 1 << 16,
STM32F4X_CLOCK_ENABLE_TIM10 = 1 << 17,
STM32F4X_CLOCK_ENABLE_TIM11 = 1 << 18,
STM32F4X_CLOCK_ENABLE_SPI5 = 1 << 20,
STM32F4X_CLOCK_ENABLE_SPI6 = 1 << 21,
STM32F4X_CLOCK_ENABLE_SAI1 = 1 << 22,
STM32F4X_CLOCK_ENABLE_DFSDM1 = 1 << 24,
STM32F4X_CLOCK_ENABLE_DFSDM2 = 1 << 25,
STM32F4X_CLOCK_ENABLE_LTDC = 1 << 26,
STM32F4X_CLOCK_ENABLE_DSI = 1 << 27,
};