tests: drivers: dma: Enabled DMA Tests for MIMXRT1010_EVK

The Buffer data was being stored in cacheable memory for
the MIMXRT1010_EVK, the caching is not handle in these
test and cause mimxrt1010 to fail, this commit moves the
memory region to DTCM and in some cases lowers the size
of the DATA Buffer since it won't fit in DTCM for MIMXRT1010_EVK

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
This commit is contained in:
Emilio Benavente 2024-09-18 17:53:50 +00:00 committed by Maureen Helm
parent c93a5de3ae
commit 63308c5f13
9 changed files with 44 additions and 0 deletions

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@ -0,0 +1,3 @@
CONFIG_CODE_DATA_RELOCATION=y
CONFIG_MEM_ATTR_HEAP=y
CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="DTCM"

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@ -0,0 +1,7 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
tst_dma0: &edma0 { };

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@ -0,0 +1,8 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*
*/
dma0: &edma0 {};

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@ -8,6 +8,7 @@ tests:
platform_allow:
- frdm_k64f
- mimxrt595_evk/mimxrt595s/cm33
- mimxrt1010_evk
- mimxrt1050_evk
- mimxrt1060_evk
- mimxrt1064_evk

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@ -0,0 +1,4 @@
CONFIG_CODE_DATA_RELOCATION=y
CONFIG_MEM_ATTR_HEAP=y
CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="DTCM"
CONFIG_DMA_LOOP_TRANSFER_SIZE=4096

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@ -0,0 +1,7 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
tst_dma0: &edma0 { };

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@ -0,0 +1,2 @@
CONFIG_DMA_TCD_QUEUE_SIZE=4
CONFIG_DMA_SG_XFER_SIZE=4096

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@ -0,0 +1,11 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
dma0 = &edma0;
};
};

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@ -7,6 +7,7 @@ tests:
platform_allow:
- intel_adsp/cavs25
- frdm_k64f
- mimxrt1010_evk
- mimxrt1060_evk
- lpcxpresso55s36
- native_sim