tests: drivers: dma: Enabled DMA Tests for MIMXRT1010_EVK
The Buffer data was being stored in cacheable memory for the MIMXRT1010_EVK, the caching is not handle in these test and cause mimxrt1010 to fail, this commit moves the memory region to DTCM and in some cases lowers the size of the DATA Buffer since it won't fit in DTCM for MIMXRT1010_EVK Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
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@ -0,0 +1,3 @@
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="DTCM"
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@ -0,0 +1,7 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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tst_dma0: &edma0 { };
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@ -0,0 +1,8 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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dma0: &edma0 {};
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@ -8,6 +8,7 @@ tests:
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platform_allow:
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- frdm_k64f
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- mimxrt595_evk/mimxrt595s/cm33
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- mimxrt1010_evk
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- mimxrt1050_evk
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- mimxrt1060_evk
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- mimxrt1064_evk
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@ -0,0 +1,4 @@
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="DTCM"
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CONFIG_DMA_LOOP_TRANSFER_SIZE=4096
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@ -0,0 +1,7 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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tst_dma0: &edma0 { };
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@ -0,0 +1,2 @@
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CONFIG_DMA_TCD_QUEUE_SIZE=4
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CONFIG_DMA_SG_XFER_SIZE=4096
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@ -0,0 +1,11 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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aliases {
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dma0 = &edma0;
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};
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};
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@ -7,6 +7,7 @@ tests:
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platform_allow:
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- intel_adsp/cavs25
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- frdm_k64f
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- mimxrt1010_evk
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- mimxrt1060_evk
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- lpcxpresso55s36
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- native_sim
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