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drivers: ethernet: ksz8081: RMII override RNB part 

I for the life of me do not know what is going on here with the RNB chip
but it seems this override must be set in order for the chip to work,
regardless of strap-in configuration, and if not set explicitly, the
value after a reset for these two bits will be seemingly random and
inconsistent. And it was working before by luck before removing a second
redundant reset in a recent commit, because apparently the register
was getting the opposite of the reset value according to the datasheet
which makes it work. The result of these bits after reset seem to vary
depending on host mcu, board, debugger, number of times reset, type of
reset, and with a pinch of random chance after keeping all variables
seemingly the same, so let's just set it to the value that works
explicitly, even if it doesn't make sense. The bit here doesn't have
clear documentation but it seems it's for using RMII regardless of the
strap in option, which is what we want to do anyways if we know the
interface type from DT, so I think it's fine, considering it is making
this driver work again.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2024-10-30 13:00:56 -05:00 committed by Mahesh Mahadevan
parent 96877736e4
commit 495a374a0d
1 changed files with 6 additions and 0 deletions
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6
drivers/ethernet/phy/phy_microchip_ksz8081.c
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@ -26,6 +26,8 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
#define PHY_MC_KSZ8081_OMSO_REG 0x16 #define PHY_MC_KSZ8081_OMSO_REG 0x16
#define PHY_MC_KSZ8081_OMSO_FACTORY_MODE_MASK BIT(15) #define PHY_MC_KSZ8081_OMSO_FACTORY_MODE_MASK BIT(15)
#define PHY_MC_KSZ8081_OMSO_NAND_TREE_MASK BIT(5) #define PHY_MC_KSZ8081_OMSO_NAND_TREE_MASK BIT(5)
#define PHY_MC_KSZ8081_OMSO_RMII_OVERRIDE_MASK BIT(1)
#define PHY_MC_KSZ8081_OMSO_MII_OVERRIDE_MASK BIT(0)
#define PHY_MC_KSZ8081_CTRL2_REG 0x1F #define PHY_MC_KSZ8081_CTRL2_REG 0x1F
#define PHY_MC_KSZ8081_CTRL2_REF_CLK_SEL BIT(7) #define PHY_MC_KSZ8081_CTRL2_REF_CLK_SEL BIT(7)
@ -235,6 +237,10 @@ static int phy_mc_ksz8081_static_cfg(const struct device *dev)
omso &= ~PHY_MC_KSZ8081_OMSO_FACTORY_MODE_MASK & omso &= ~PHY_MC_KSZ8081_OMSO_FACTORY_MODE_MASK &
~PHY_MC_KSZ8081_OMSO_NAND_TREE_MASK; ~PHY_MC_KSZ8081_OMSO_NAND_TREE_MASK;
if (config->phy_iface == KSZ8081_RMII) {
omso &= ~PHY_MC_KSZ8081_OMSO_MII_OVERRIDE_MASK;
omso |= PHY_MC_KSZ8081_OMSO_RMII_OVERRIDE_MASK;
}
ret = phy_mc_ksz8081_write(dev, PHY_MC_KSZ8081_OMSO_REG, (uint32_t)omso); ret = phy_mc_ksz8081_write(dev, PHY_MC_KSZ8081_OMSO_REG, (uint32_t)omso);
if (ret) { if (ret) {