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/*
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* Copyright (c) 2022 Florin Stancu <niflostancu@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_cc13xx_cc26xx_adc
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#include <errno.h>
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#define LOG_LEVEL CONFIG_ADC_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(adc_cc13xx_cc26xx);
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <zephyr/init.h>
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#include <zephyr/drivers/adc.h>
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#include <soc.h>
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/* Driverlib includes */
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#include <inc/hw_types.h>
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#include <driverlib/interrupt.h>
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#include <driverlib/ioc.h>
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#include <driverlib/rom.h>
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#include <driverlib/prcm.h>
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#include <driverlib/aux_adc.h>
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#include <ti/devices/cc13x2_cc26x2/inc/hw_aux_evctl.h>
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include "adc_context.h"
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/**
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* Channels are based on ADC_COMPB_IN_* hal_ti definitions, max. index is 16 (included).
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*/
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#define MAX_CHAN_ID 0x10
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/** Internal sample time unit conversion entry. */
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struct adc_cc13xx_cc26xx_sample_time_entry {
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uint16_t time_us;
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uint8_t reg_value;
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};
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/** Maps standard unit sample times (us) to internal (raw hal_ti register) values */
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static const struct adc_cc13xx_cc26xx_sample_time_entry adc_cc13xx_sample_times[] = {
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{ 2, AUXADC_SAMPLE_TIME_2P7_US },
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{ 5, AUXADC_SAMPLE_TIME_5P3_US },
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{ 10, AUXADC_SAMPLE_TIME_10P6_US },
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{ 21, AUXADC_SAMPLE_TIME_21P3_US },
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{ 42, AUXADC_SAMPLE_TIME_42P6_US },
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{ 85, AUXADC_SAMPLE_TIME_85P3_US },
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{ 170, AUXADC_SAMPLE_TIME_170_US },
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{ 341, AUXADC_SAMPLE_TIME_341_US },
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{ 682, AUXADC_SAMPLE_TIME_682_US },
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{ 1370, AUXADC_SAMPLE_TIME_1P37_MS },
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{ 2730, AUXADC_SAMPLE_TIME_2P73_MS },
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{ 5460, AUXADC_SAMPLE_TIME_5P46_MS },
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{ 10900, AUXADC_SAMPLE_TIME_10P9_MS },
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};
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struct adc_cc13xx_cc26xx_data {
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struct adc_context ctx;
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const struct device *dev;
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uint32_t ref_source;
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uint8_t sample_time;
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uint16_t *buffer;
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uint16_t *repeat_buffer;
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};
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struct adc_cc13xx_cc26xx_cfg {
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unsigned long base;
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void (*irq_cfg_func)(void);
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};
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static void adc_cc13xx_cc26xx_isr(const struct device *dev);
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct adc_cc13xx_cc26xx_data *data =
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CONTAINER_OF(ctx, struct adc_cc13xx_cc26xx_data, ctx);
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data->repeat_buffer = data->buffer;
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AUXADCEnableSync(data->ref_source, data->sample_time, AUXADC_TRIGGER_MANUAL);
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AUXADCGenManualTrigger();
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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bool repeat)
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{
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struct adc_cc13xx_cc26xx_data *data =
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CONTAINER_OF(ctx, struct adc_cc13xx_cc26xx_data, ctx);
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if (repeat) {
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data->buffer = data->repeat_buffer;
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} else {
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data->buffer++;
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}
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}
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static int adc_cc13xx_cc26xx_init(const struct device *dev)
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{
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struct adc_cc13xx_cc26xx_data *data = dev->data;
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const struct adc_cc13xx_cc26xx_cfg *config = dev->config;
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data->dev = dev;
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/* clear any previous events */
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AUXADCDisable();
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HWREG(AUX_EVCTL_BASE + AUX_EVCTL_O_EVTOMCUFLAGSCLR) =
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(AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_IRQ | AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_DONE);
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config->irq_cfg_func();
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static int adc_cc13xx_cc26xx_channel_setup(const struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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struct adc_cc13xx_cc26xx_data *data = dev->data;
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const uint8_t ch = channel_cfg->channel_id;
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uint16_t sample_time_us = 0;
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uint8_t i;
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if (ch > MAX_CHAN_ID) {
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LOG_ERR("Channel 0x%X is not supported, max 0x%X", ch, MAX_CHAN_ID);
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return -EINVAL;
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}
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switch (ADC_ACQ_TIME_UNIT(channel_cfg->acquisition_time)) {
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case ADC_ACQ_TIME_TICKS:
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data->sample_time = (uint16_t)ADC_ACQ_TIME_VALUE(channel_cfg->acquisition_time);
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break;
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case ADC_ACQ_TIME_MICROSECONDS:
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sample_time_us = (uint16_t)ADC_ACQ_TIME_VALUE(channel_cfg->acquisition_time);
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break;
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case ADC_ACQ_TIME_NANOSECONDS:
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sample_time_us = (uint16_t)(
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ADC_ACQ_TIME_VALUE(channel_cfg->acquisition_time) * 1000);
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break;
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default:
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data->sample_time = AUXADC_SAMPLE_TIME_170_US;
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break;
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}
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if (sample_time_us) {
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/* choose the nearest sample time configuration */
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data->sample_time = adc_cc13xx_sample_times[0].reg_value;
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for (i = 0; i < ARRAY_SIZE(adc_cc13xx_sample_times); i++) {
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if (adc_cc13xx_sample_times[i].time_us >= sample_time_us) {
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break;
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}
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data->sample_time = adc_cc13xx_sample_times[i].reg_value;
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}
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if (i >= ARRAY_SIZE(adc_cc13xx_sample_times)) {
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LOG_ERR("Acquisition time is not valid");
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return -EINVAL;
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}
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}
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if (channel_cfg->differential) {
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LOG_ERR("Differential channels are not supported");
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return -EINVAL;
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}
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if (channel_cfg->gain != ADC_GAIN_1) {
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LOG_ERR("Gain is not valid");
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return -EINVAL;
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}
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if (channel_cfg->reference == ADC_REF_INTERNAL) {
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data->ref_source = AUXADC_REF_FIXED;
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} else if (channel_cfg->reference == ADC_REF_VDD_1) {
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data->ref_source = AUXADC_REF_VDDS_REL;
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} else {
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LOG_ERR("Reference is not valid");
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return -EINVAL;
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}
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LOG_DBG("Setup %d acq time %d", ch, data->sample_time);
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AUXADCDisable();
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AUXADCSelectInput(ch);
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return 0;
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}
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static int cc13xx_cc26xx_read(const struct device *dev,
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const struct adc_sequence *sequence,
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bool asynchronous,
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struct k_poll_signal *sig)
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{
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struct adc_cc13xx_cc26xx_data *data = dev->data;
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int rv;
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size_t exp_size;
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if (sequence->resolution != 12) {
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LOG_ERR("Only 12 Resolution is supported, but %d got",
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sequence->resolution);
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return -EINVAL;
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}
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exp_size = sizeof(uint16_t);
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if (sequence->options) {
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exp_size *= (1 + sequence->options->extra_samplings);
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}
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if (sequence->buffer_size < exp_size) {
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LOG_ERR("Required buffer size is %u, but %u got",
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exp_size, sequence->buffer_size);
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return -ENOMEM;
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}
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data->buffer = sequence->buffer;
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adc_context_lock(&data->ctx, asynchronous, sig);
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adc_context_start_read(&data->ctx, sequence);
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rv = adc_context_wait_for_completion(&data->ctx);
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adc_context_release(&data->ctx, rv);
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return rv;
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}
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static int adc_cc13xx_cc26xx_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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return cc13xx_cc26xx_read(dev, sequence, false, NULL);
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}
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#ifdef CONFIG_ADC_ASYNC
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static int adc_cc13xx_cc26xx_read_async(const struct device *dev,
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const struct adc_sequence *sequence,
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struct k_poll_signal *async)
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{
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return cc13xx_cc26xx_read(dev, sequence, true, async);
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}
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#endif
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/**
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* AUX_ADC_IRQ handler, called for either of these events:
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* - conversion complete or DMA done (if used);
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* - FIFO underflow or overflow;
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*/
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static void adc_cc13xx_cc26xx_isr(const struct device *dev)
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{
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struct adc_cc13xx_cc26xx_data *data = dev->data;
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/* get the statuses of ADC_DONE and ADC_IRQ events in order to clear them both */
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uint32_t ev_status = (
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HWREG(AUX_EVCTL_BASE + AUX_EVCTL_O_EVTOMCUFLAGS) &
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(AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_IRQ | AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_DONE)
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);
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uint32_t fifo_status;
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uint32_t adc_value;
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/* clear the AUXADC-related event flags */
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HWREG(AUX_EVCTL_BASE + AUX_EVCTL_O_EVTOMCUFLAGSCLR) = ev_status;
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/* check the ADC FIFO's status */
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fifo_status = AUXADCGetFifoStatus();
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LOG_DBG("ISR flags 0x%08X fifo 0x%08X", ev_status, fifo_status);
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if ((fifo_status & (AUX_ANAIF_ADCFIFOSTAT_OVERFLOW | AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW))) {
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AUXADCFlushFifo();
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}
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if ((fifo_status & AUX_ANAIF_ADCFIFOSTAT_EMPTY_M)) {
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/* no ADC values available */
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return;
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}
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adc_value = AUXADCPopFifo();
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LOG_DBG("ADC buf %04X val %d", (unsigned int)data->buffer, adc_value);
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*data->buffer = adc_value;
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AUXADCDisable();
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adc_context_on_sampling_done(&data->ctx, dev);
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}
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static const struct adc_driver_api cc13xx_cc26xx_driver_api = {
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.channel_setup = adc_cc13xx_cc26xx_channel_setup,
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.read = adc_cc13xx_cc26xx_read,
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#ifdef CONFIG_ADC_ASYNC
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.read_async = adc_cc13xx_cc26xx_read_async,
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#endif
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.ref_internal = 4300, /* fixed reference: 4.3V */
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};
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#define CC13XX_CC26XX_ADC_INIT(index) \
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static void adc_cc13xx_cc26xx_cfg_func_##index(void); \
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static const struct adc_cc13xx_cc26xx_cfg adc_cc13xx_cc26xx_cfg_##index = { \
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.base = DT_INST_REG_ADDR(index), \
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.irq_cfg_func = adc_cc13xx_cc26xx_cfg_func_##index, \
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}; \
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static struct adc_cc13xx_cc26xx_data adc_cc13xx_cc26xx_data_##index = { \
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ADC_CONTEXT_INIT_TIMER(adc_cc13xx_cc26xx_data_##index, ctx), \
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ADC_CONTEXT_INIT_LOCK(adc_cc13xx_cc26xx_data_##index, ctx), \
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ADC_CONTEXT_INIT_SYNC(adc_cc13xx_cc26xx_data_##index, ctx), \
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}; \
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DEVICE_DT_INST_DEFINE(index, \
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&adc_cc13xx_cc26xx_init, NULL, \
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&adc_cc13xx_cc26xx_data_##index, \
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&adc_cc13xx_cc26xx_cfg_##index, POST_KERNEL, \
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CONFIG_ADC_INIT_PRIORITY, \
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&cc13xx_cc26xx_driver_api); \
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\
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static void adc_cc13xx_cc26xx_cfg_func_##index(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(index), DT_INST_IRQ(index, priority), \
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adc_cc13xx_cc26xx_isr, DEVICE_DT_INST_GET(index), 0); \
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irq_enable(DT_INST_IRQN(index)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(CC13XX_CC26XX_ADC_INIT)
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