drivers: pinctrl: pfc_rcar: add mapping of memory for Spider ARM64
Add mapping of PFC device memory for Spider ARM64. Make mapping code common for all RCar boards. Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
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@ -21,20 +21,24 @@
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#if defined(CONFIG_SOC_SERIES_RCAR_GEN3)
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#define PFC_RCAR_GPSR 0x100
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#define PFC_RCAR_IPSR 0x200
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DEVICE_MMIO_TOPLEVEL_STATIC(pfc, DT_DRV_INST(0));
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static uintptr_t reg_base[1];
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#elif defined(CONFIG_SOC_SERIES_RCAR_GEN4)
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#define PFC_RCAR_GPSR 0x040
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#define PFC_RCAR_IPSR 0x060
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/* swap both arguments */
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#define PFC_REG_ADDRESS(idx, node_id) DT_REG_ADDR_BY_IDX(node_id, idx)
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static const uintptr_t reg_base[] = {
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LISTIFY(DT_NUM_REGS(DT_DRV_INST(0)), PFC_REG_ADDRESS, (,), DT_DRV_INST(0))
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};
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#else
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#error Unsupported SoC Series
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#endif
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/* swap both arguments */
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#define PFC_REG_ADDRESS(idx, inst) DT_INST_REG_ADDR_BY_IDX(inst, idx)
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static uintptr_t reg_base[] = {
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LISTIFY(DT_NUM_REGS(DT_DRV_INST(0)), PFC_REG_ADDRESS, (,), 0)
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};
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#define PFC_REG_SIZE(idx, inst) DT_INST_REG_SIZE_BY_IDX(inst, idx)
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static const uintptr_t __maybe_unused reg_sizes[] = {
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LISTIFY(DT_NUM_REGS(DT_DRV_INST(0)), PFC_REG_SIZE, (,), 0)
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};
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#ifdef CONFIG_PINCTRL_RCAR_VOLTAGE_CONTROL
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/* POC Control Register can control IO voltage level that is supplied to the pin */
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struct pfc_pocctrl_reg {
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@ -372,11 +376,12 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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return ret;
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}
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#if defined(CONFIG_SOC_SERIES_RCAR_GEN3)
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#if defined(DEVICE_MMIO_IS_IN_RAM)
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__boot_func static int pfc_rcar_driver_init(void)
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{
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DEVICE_MMIO_TOPLEVEL_MAP(pfc, K_MEM_CACHE_NONE);
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reg_base[0] = DEVICE_MMIO_TOPLEVEL_GET(pfc);
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for (unsigned int i = 0; i < ARRAY_SIZE(reg_base); i++) {
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device_map(reg_base + i, reg_base[i], reg_sizes[i], K_MEM_CACHE_NONE);
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}
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return 0;
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}
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