board: renesas: Add initial support for RA6E1 SoC

Initial commit to support FPB-RA6E1 SoC

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>

boards/renesas/fpb_ra6e1/Kconfig.fpb_ra6e1

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_FPB_RA6E1
+	select SOC_R7FA6E10F2CFP

boards/renesas/fpb_ra6e1/board.cmake

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=R7FA6E10F")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/renesas/fpb_ra6e1/board.yml

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+board:
+  name: fpb_ra6e1
+  vendor: renesas
+  socs:
+  - name: r7fa6e10f2cfp

boards/renesas/fpb_ra6e1/doc/index.rst

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+.. _fpb_ra6e1:
+
+RA6E1 Fast Prototyping Board
+############################
+
+Overview
+********
+
+The Renesas RA6E1 group uses the high-performance Arm® Cortex®-M33 core with
+TrustZone®. The RA6E1 is suitable for entry IoT applications requiring streamlined
+feature and connectivity integration including Ethernet, and unprecedented performance
+with 790.75 CoreMark, which are 3.95CoreMark / Mhz.
+
+The key features of the FPB-RA6E1 board are categorized in three groups as follow:
+
+**MCU Native Pin Access**
+
+- 200MHz Arm Cortex-M33 based RA6E1 MCU in 100 pins, LQFP package
+- Native pin access through 2 x 50-pin male headers (not fitted)
+- MCU current measurement point for precision current consumption measurement
+- Multiple clock sources - Low-precision (~1%) clocks are available internal to
+  the RA MCU. RA MCU oscillator and sub-clock oscillator crystals, providing
+  precision 24.000 MHz (not fitted) and 32,768 Hz reference clocks are also available
+
+**System Control and Ecosystem Access**
+
+- Two 5V input sources
+
+  - USB (Debug, Full Speed, High Speed)
+  - External power supply (using 2-pin header) (not fitted)
+
+- Built-in SEGGER J-Link Emulator On-Board programmer/debugger (SWD)
+
+- User LEDs and buttons
+
+  - Two User LEDs (green)
+  - Power LED (green) (not fitted) indicating availability of regulated power
+  - Debug/power LED (yellow) indicating power and the debug connection
+  - One User button
+  - One Reset button
+
+- Two popular ecosystems expansions
+
+  - Two Digilent PmodTM (SPI, UART) connectors (not fitted)
+  - Arduino (Uno R3) connector
+
+- MCU boot configuration jumper
+
+.. figure:: fpb-ra6e1-board.webp
+	:align: center
+	:alt: RA6E1 Evaluation Kit
+
+	FPB-RA6E1 Board Functional Area Definitions (Credit: Renesas Electronics Corporation)
+
+Hardware
+********
+Detailed hardware feature for the RA6E1 MCU group can be found at `RA6E1 Group User's Manual Hardware`_
+
+.. figure:: ra6e1-block-diagram.webp
+	:width: 442px
+	:align: center
+	:alt: RA6E1 MCU group feature
+
+	RA6E1 Block diagram (Credit: Renesas Electronics Corporation)
+
+Detailed hardware feature for the FPB-RA6E1 MCU can be found at `FPB-RA6E1 - User's Manual`_
+
+Supported Features
+==================
+
+The below features are currently supported on Zephyr OS for FPB-RA6E1 board:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| MPU       | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| NVIC      | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| UART      | on-chip    | serial               |
++-----------+------------+----------------------+
+| FLASH     | on-chip    | flash                |
++-----------+------------+----------------------+
+
+Other hardware features are currently not supported by the port.
+
+Programming and Debugging
+*************************
+
+Applications for the ``fpb_ra6e1`` board target configuration can be
+built, flashed, and debugged in the usual way. See
+:ref:`build_an_application` and :ref:`application_run` for more details on
+building and running.
+
+Flashing
+========
+
+Program can be flashed to FPB-RA6E1 via the on-board SEGGER J-Link debugger.
+SEGGER J-link's drivers are avaialbe at https://www.segger.com/downloads/jlink/
+
+To flash the program to board
+
+  1. Connect to J-Link OB via USB port to host PC
+
+  2. Make sure J-Link OB jumper is in default configuration as describe in `FPB-RA6E1 - User's Manual`_
+
+  3. Execute west command
+
+	.. code-block:: console
+
+		west flash -r jlink
+
+Debugging
+=========
+
+You can use Segger Ozone (`Segger Ozone Download`_) for a visual debug interface
+
+Once downloaded and installed, open Segger Ozone and configure the debug project
+like so:
+
+* Target Device: R7FA6E10F
+* Target Interface: SWD
+* Target Interface Speed: 4 MHz
+* Host Interface: USB
+* Program File: <path/to/your/build/zephyr.elf>
+
+**Note:** It's verified that we can debug OK on Segger Ozone v3.30d so please use this or later
+version of Segger Ozone
+
+References
+**********
+- `FPB-RA6E1 Website`_
+- `RA6E1 MCU group Website`_
+
+.. _FPB-RA6E1 Website:
+   https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/fpb-ra6e1-fast-prototyping-board-ra6e1-mcu-group#overview
+
+.. _RA6E1 MCU group Website:
+   https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ra6e1-200mhz-arm-cortex-m33-entry-line-high-performance-streamlined-connectivity
+
+.. _FPB-RA6E1 - User's Manual:
+   https://www.renesas.com/us/en/document/mat/fpb-ra6e1-users-manual
+
+.. _RA6E1 Group User's Manual Hardware:
+   https://www.renesas.com/us/en/document/mah/ra6e1-group-users-manual-hardware
+
+.. _Segger Ozone Download:
+   https://www.segger.com/downloads/jlink#Ozone

boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi

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+/*
+ * Copyright (c) 2024 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	sci0_default: sci0_default {
+		group1 {
+			/* tx rx */
+			psels = <RA_PSEL(RA_PSEL_SCI_0, 1, 1)>,
+			<RA_PSEL(RA_PSEL_SCI_0, 1, 0)>;
+		};
+	};
+};

boards/renesas/fpb_ra6e1/fpb_ra6e1.dts

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+/*
+ * Copyright (c) 2024 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <renesas/ra/ra6/r7fa6e10f2cfp.dtsi>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "fpb_ra6e1-pinctrl.dtsi"
+
+/ {
+	model = "Renesas FPB-RA6E1";
+	compatible = "renesas,ra6e1", "renesas,ra";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led1: led1 {
+			gpios = <&ioport4 7 GPIO_ACTIVE_HIGH>;
+			label = "LED1";
+		};
+		led2: led2 {
+			gpios = <&ioport4 8 GPIO_ACTIVE_HIGH>;
+			label = "LED2";
+		};
+	};
+
+	aliases {
+		led0 = &led1;
+	};
+};
+
+&sci0 {
+	pinctrl-0 = <&sci0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	uart0: uart {
+		current-speed = <115200>;
+		status = "okay";
+	};
+};
+
+&ioport4 {
+	status = "okay";
+};
+
+&subclk {
+	status = "okay";
+};
+
+&pll {
+	source = <RA_PLL_SOURCE_HOCO>;
+	div = <RA_PLL_DIV_2>;
+	mul = <20 0>;
+	freq = <DT_FREQ_M(200)>;
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "application";
+			reg = <0x00000000 DT_SIZE_K(512)>;
+		};
+
+		storage_partition: partition@80000 {
+			label = "storage";
+			reg = <0x80000 DT_SIZE_K(512)>;
+		};
+	};
+};

boards/renesas/fpb_ra6e1/fpb_ra6e1.yaml

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+identifier: fpb_ra6e1
+name: Renesas FPB-RA6E1
+type: mcu
+arch: arm
+ram: 256
+flash: 1024
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - gpio

boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
+
+# Enable GPIO
+CONFIG_GPIO=y
+CONFIG_PINCTRL=y
+
+CONFIG_BUILD_OUTPUT_HEX=y
+CONFIG_BUILD_NO_GAP_FILL=y
+
+# Enable Console
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_UART_CONSOLE=y
+CONFIG_CONSOLE=y

tests/drivers/uart/uart_async_api/boards/fpb_ra6e1.overlay

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+/*
+ * Copyright (c) 2024 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	sci9_default: sci9_default {
+		group1 {
+			/* tx rx */
+			psels = <RA_PSEL(RA_PSEL_SCI_9, 6, 2)>,
+			<RA_PSEL(RA_PSEL_SCI_9, 6, 1)>;
+		};
+	};
+};
+
+&sci9 {
+	pinctrl-0 = <&sci9_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	dut: uart {
+		current-speed = <115200>;
+		status = "okay";
+	};
+};