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device: rv32m1: Convert clock control to use DEVICE_DT_GET 

Replace device_get_binding with DEVICE_DT_GET for getting access
to the clock controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2021-02-11 18:05:31 -06:00 committed by Kumar Gala
parent ff3fd6dc37
commit 3a8fffb9c3
6 changed files with 24 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpio/gpio_rv32m1.c
View File

@ -24,7 +24,7 @@ struct gpio_rv32m1_config {
GPIO_Type *gpio_base;
PORT_Type *port_base;
unsigned int flags;
char *clock_controller;
const struct device *clock_dev;
clock_control_subsys_t clock_subsys;
int (*irq_config_func)(const struct device *dev);
};
@ -263,16 +263,10 @@ static void gpio_rv32m1_port_isr(const struct device *dev)
static int gpio_rv32m1_init(const struct device *dev)
{
const struct gpio_rv32m1_config *config = dev->config;
const struct device *clk;
int ret;
if (config->clock_controller) {
clk = device_get_binding(config->clock_controller);
if (!clk) {
return -ENODEV;
}
ret = clock_control_on(clk, config->clock_subsys);
if (config->clock_dev) {
ret = clock_control_on(config->clock_dev, config->clock_subsys);
if (ret < 0) {
return ret;
@ -295,8 +289,8 @@ static const struct gpio_driver_api gpio_rv32m1_driver_api = {
#define INST_DT_PORT_ADDR(n) \
DT_REG_ADDR(DT_INST_PHANDLE(n, openisa_rv32m1_port))
#define INST_DT_CLK_CTRL_LABEL(n) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, clocks), DT_INST_CLOCKS_LABEL(n))
#define INST_DT_CLK_CTRL_DEV(n) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, clocks), DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)))
#define INST_DT_CLK_CELL_NAME(n) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, clocks), DT_INST_CLOCKS_CELL(n, name))
@ -311,7 +305,7 @@ static const struct gpio_driver_api gpio_rv32m1_driver_api = {
.port_base = (PORT_Type *) INST_DT_PORT_ADDR(n), \
.flags = GPIO_INT_ENABLE, \
.irq_config_func = gpio_rv32m1_##n##_init, \
.clock_controller = INST_DT_CLK_CTRL_LABEL(n), \
.clock_dev = INST_DT_CLK_CTRL_DEV(n), \
.clock_subsys = (clock_control_subsys_t) \
INST_DT_CLK_CELL_NAME(n) \
}; \

26
drivers/i2c/i2c_rv32m1_lpi2c.c
View File

@ -20,7 +20,7 @@ LOG_MODULE_REGISTER(rv32m1_lpi2c);
struct rv32m1_lpi2c_config {
LPI2C_Type *base;
char *clock_controller;
const struct device *clock_dev;
clock_control_subsys_t clock_subsys;
clock_ip_name_t clock_ip_name;
uint32_t clock_ip_src;
@ -39,7 +39,6 @@ static int rv32m1_lpi2c_configure(const struct device *dev,
uint32_t dev_config)
{
const struct rv32m1_lpi2c_config *config = dev->config;
const struct device *clk;
uint32_t baudrate;
uint32_t clk_freq;
int err;
@ -79,14 +78,7 @@ static int rv32m1_lpi2c_configure(const struct device *dev,
return -ENOTSUP;
}
clk = device_get_binding(config->clock_controller);
if (!clk) {
LOG_ERR("Could not get clock controller '%s'",
config->clock_controller);
return -EINVAL;
}
err = clock_control_get_rate(clk, config->clock_subsys, &clk_freq);
err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq);
if (err) {
LOG_ERR("Could not get clock frequency (err %d)", err);
return -EINVAL;
@ -213,26 +205,18 @@ static int rv32m1_lpi2c_init(const struct device *dev)
const struct rv32m1_lpi2c_config *config = dev->config;
struct rv32m1_lpi2c_data *data = dev->data;
lpi2c_master_config_t master_config;
const struct device *clk;
uint32_t clk_freq, dev_cfg;
int err;
CLOCK_SetIpSrc(config->clock_ip_name, config->clock_ip_src);
clk = device_get_binding(config->clock_controller);
if (!clk) {
LOG_ERR("Could not get clock controller '%s'",
config->clock_controller);
return -EINVAL;
}
err = clock_control_on(clk, config->clock_subsys);
err = clock_control_on(config->clock_dev, config->clock_subsys);
if (err) {
LOG_ERR("Could not turn on clock (err %d)", err);
return -EINVAL;
}
err = clock_control_get_rate(clk, config->clock_subsys, &clk_freq);
err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq);
if (err) {
LOG_ERR("Could not get clock frequency (err %d)", err);
return -EINVAL;
@ -266,7 +250,7 @@ static const struct i2c_driver_api rv32m1_lpi2c_driver_api = {
static const struct rv32m1_lpi2c_config rv32m1_lpi2c_##id##_config = { \
.base = \
(LPI2C_Type *)DT_INST_REG_ADDR(id), \
.clock_controller = DT_INST_CLOCKS_LABEL(id), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(id)), \
.clock_subsys = \
(clock_control_subsys_t) DT_INST_CLOCKS_CELL(id, name),\
.clock_ip_name = INST_DT_CLOCK_IP_NAME(id), \

11
drivers/interrupt_controller/intc_rv32m1_intmux.c
View File

@ -40,7 +40,7 @@
struct rv32m1_intmux_config {
INTMUX_Type *regs;
char *clock_name;
const struct device *clock_dev;
clock_control_subsys_t clock_subsys;
struct _isr_table_entry *isr_base;
};
@ -145,7 +145,7 @@ static const struct irq_next_level_api rv32m1_intmux_apis = {
static const struct rv32m1_intmux_config rv32m1_intmux_cfg = {
.regs = (INTMUX_Type *)DT_INST_REG_ADDR(0),
.clock_name = DT_INST_CLOCKS_LABEL(0),
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(0)),
.clock_subsys = UINT_TO_POINTER(DT_INST_CLOCKS_CELL(0, name)),
.isr_base = &_sw_isr_table[CONFIG_2ND_LVL_ISR_TBL_OFFSET],
};
@ -154,15 +154,10 @@ static int rv32m1_intmux_init(const struct device *dev)
{
const struct rv32m1_intmux_config *config = DEV_CFG(dev);
INTMUX_Type *regs = DEV_REGS(dev);
const struct device *clock_dev = device_get_binding(config->clock_name);
size_t i;
if (!clock_dev) {
return -ENODEV;
}
/* Enable INTMUX clock. */
clock_control_on(clock_dev, config->clock_subsys);
clock_control_on(config->clock_dev, config->clock_subsys);
/*
* Reset all channels, not just the ones we're configured to

16
drivers/pwm/pwm_rv32m1_tpm.c
View File

@ -24,7 +24,7 @@ LOG_MODULE_REGISTER(pwm_rv32m1_tpm);
struct rv32m1_tpm_config {
TPM_Type *base;
char *clock_name;
const struct device *clock_dev;
clock_control_subsys_t clock_subsys;
tpm_clock_source_t tpm_clock_source;
tpm_clock_prescale_t prescale;
@ -132,7 +132,6 @@ static int rv32m1_tpm_init(const struct device *dev)
const struct rv32m1_tpm_config *config = dev->config;
struct rv32m1_tpm_data *data = dev->data;
tpm_chnl_pwm_signal_param_t *channel = data->channel;
const struct device *clock_dev;
tpm_config_t tpm_config;
int i;
@ -141,18 +140,12 @@ static int rv32m1_tpm_init(const struct device *dev)
return -EINVAL;
}
clock_dev = device_get_binding(config->clock_name);
if (clock_dev == NULL) {
LOG_ERR("Could not get clock device");
return -EINVAL;
}
if (clock_control_on(clock_dev, config->clock_subsys)) {
if (clock_control_on(config->clock_dev, config->clock_subsys)) {
LOG_ERR("Could not turn on clock");
return -EINVAL;
}
if (clock_control_get_rate(clock_dev, config->clock_subsys,
if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
&data->clock_freq)) {
LOG_ERR("Could not get clock frequency");
return -EINVAL;
@ -183,8 +176,7 @@ static const struct pwm_driver_api rv32m1_tpm_driver_api = {
static const struct rv32m1_tpm_config rv32m1_tpm_config_##n = { \
.base = (TPM_Type *) \
DT_INST_REG_ADDR(n), \
.clock_name = \
DT_INST_CLOCKS_LABEL(n), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_subsys = (clock_control_subsys_t) \
DT_INST_CLOCKS_CELL(n, name), \
.tpm_clock_source = kTPM_SystemClock, \

12
drivers/serial/uart_rv32m1_lpuart.c
View File

@ -16,7 +16,7 @@
struct rv32m1_lpuart_config {
LPUART_Type *base;
char *clock_name;
const struct device *clock_dev;
clock_control_subsys_t clock_subsys;
clock_ip_name_t clock_ip_name;
uint32_t clock_ip_src;
@ -239,19 +239,13 @@ static int rv32m1_lpuart_init(const struct device *dev)
{
const struct rv32m1_lpuart_config *config = dev->config;
lpuart_config_t uart_config;
const struct device *clock_dev;
uint32_t clock_freq;
/* set clock source */
/* TODO: Don't change if another core has configured */
CLOCK_SetIpSrc(config->clock_ip_name, config->clock_ip_src);
clock_dev = device_get_binding(config->clock_name);
if (clock_dev == NULL) {
return -EINVAL;
}
if (clock_control_get_rate(clock_dev, config->clock_subsys,
if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
&clock_freq)) {
return -EINVAL;
}
@ -299,7 +293,7 @@ static const struct uart_driver_api rv32m1_lpuart_driver_api = {
#define RV32M1_LPUART_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct rv32m1_lpuart_config rv32m1_lpuart_##n##_cfg = {\
.base = (LPUART_Type *)DT_INST_REG_ADDR(n), \
.clock_name = DT_INST_CLOCKS_LABEL(n), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_subsys = \
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
.clock_ip_name = INST_DT_CLOCK_IP_NAME(n), \

12
drivers/spi/spi_rv32m1_lpspi.c
View File

@ -24,7 +24,7 @@ LOG_MODULE_REGISTER(spi_rv32m1_lpspi);
struct spi_mcux_config {
LPSPI_Type *base;
char *clock_name;
const struct device *clock_dev;
clock_control_subsys_t clock_subsys;
clock_ip_name_t clock_ip_name;
uint32_t clock_ip_src;
@ -132,7 +132,6 @@ static int spi_mcux_configure(const struct device *dev,
struct spi_mcux_data *data = dev->data;
LPSPI_Type *base = config->base;
lpspi_master_config_t master_config;
const struct device *clock_dev;
uint32_t clock_freq;
uint32_t word_size;
@ -176,12 +175,7 @@ static int spi_mcux_configure(const struct device *dev,
master_config.baudRate = spi_cfg->frequency;
clock_dev = device_get_binding(config->clock_name);
if (clock_dev == NULL) {
return -EINVAL;
}
if (clock_control_get_rate(clock_dev, config->clock_subsys,
if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
&clock_freq)) {
return -EINVAL;
}
@ -288,7 +282,7 @@ static const struct spi_driver_api spi_mcux_driver_api = {
\
static const struct spi_mcux_config spi_mcux_config_##n = { \
.base = (LPSPI_Type *) DT_INST_REG_ADDR(n), \
.clock_name = DT_INST_CLOCKS_LABEL(n), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_subsys = (clock_control_subsys_t) \
DT_INST_CLOCKS_CELL(n, name), \
.irq_config_func = spi_mcux_config_func_##n, \