soc: nordic: Disable asserts on ppr and flpr

Asserts are by default enabled for tests but flpr and ppr are
small cores (<64k) and many tests does not fit in memory with
asserts enabled.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This commit is contained in:
Krzysztof Chruściński 2024-09-24 08:24:46 +02:00 committed by Fabio Baltieri
parent ffe6910e21
commit 3786b617bd
5 changed files with 19 additions and 0 deletions

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@ -6,4 +6,8 @@ if SOC_NRF54H20_CPUFLPR
config NUM_IRQS config NUM_IRQS
default 496 default 496
# As FLPR has limited memory most of tests does not fit with asserts enabled.
config ASSERT
default n
endif # SOC_NRF54H20_CPUFLPR endif # SOC_NRF54H20_CPUFLPR

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@ -8,5 +8,9 @@ config NUM_IRQS
config SYS_CLOCK_TICKS_PER_SEC config SYS_CLOCK_TICKS_PER_SEC
default 1000 default 1000
#
# As PPR has limited memory most of tests does not fit with asserts enabled.
config ASSERT
default n
endif # SOC_NRF54H20_CPUPPR endif # SOC_NRF54H20_CPUPPR

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@ -8,4 +8,8 @@ if SOC_NRF54L15_CPUFLPR
config NUM_IRQS config NUM_IRQS
default 287 default 287
# As FLPR has limited memory most of tests does not fit with asserts enabled.
config ASSERT
default n
endif # SOC_NRF54L15_CPUFLPR endif # SOC_NRF54L15_CPUFLPR

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@ -11,5 +11,8 @@ config RISCV_HAS_CPU_IDLE
config NUM_IRQS config NUM_IRQS
int int
default 287 default 287
# As FLPR has limited memory most of tests does not fit with asserts enabled.
config ASSERT
default n
endif # SOC_NRF54L15_ENGA_CPUFLPR endif # SOC_NRF54L15_ENGA_CPUFLPR

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@ -12,4 +12,8 @@ config SYS_CLOCK_TICKS_PER_SEC
config RV_BOOT_HART config RV_BOOT_HART
default 13 if SOC_NRF9230_ENGB default 13 if SOC_NRF9230_ENGB
# As FLPR has limited memory most of tests does not fit with asserts enabled.
config ASSERT
default n
endif # SOC_NRF9280_CPUPPR endif # SOC_NRF9280_CPUPPR