From 3604aba75b1c43bc0d3c508416891bb24b84905c Mon Sep 17 00:00:00 2001 From: Daniel DeGrasse Date: Mon, 23 Sep 2024 09:29:43 -0500 Subject: [PATCH] shields: lcd_par_s035: rename nxp_flexio_lcd to zephyr_mipi_dbi_parallel Although the parallel mipi dbi mode pinout used for the LCD PAR S035 display is specific to NXP boards, the definition of the display is generic, and does not require NXP-specific parallel mipi dbi IP. Therefore, rename the MIPI DBI node for this display from `nxp_flexio_lcd` to `zephyr_mipi_dbi_parallel`. The gpio-nexus node name is unchanged, as the pinout it describes is specific to NXP. Signed-off-by: Daniel DeGrasse --- boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi | 2 +- boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi index 7e95ec16144..2f2d27a4f11 100644 --- a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi +++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi @@ -209,7 +209,7 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 { pinctrl-names = "default"; }; -nxp_flexio_lcd: &flexio0_lcd { +zephyr_mipi_dbi_parallel: &flexio0_lcd { /* DMA channels 0, muxed to FlexIO TX */ dmas = <&edma0 0 61>; dma-names = "tx"; diff --git a/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay b/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay index 9306610bc1f..bd305564be4 100644 --- a/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay +++ b/boards/shields/lcd_par_s035/lcd_par_s035_8080.overlay @@ -29,7 +29,7 @@ }; }; -&nxp_flexio_lcd { +&zephyr_mipi_dbi_parallel { status = "okay"; #address-cells = <1>; #size-cells = <0>;