platform doc: Fix fsl_frdm_k64f content issues
Fixes minor content issues with the fsl_frdm_k64f documentation such as ... 1. Avoid use of "Zephyr projects" 2. Fix referenced variable and file names 3. Fix default value of NUM_IRQS Kconfig option 4. Fix typos Change-Id: Id5f2d219fab7ba184f0b1ae1c0d28894e69faacc Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This commit is contained in:
Peter Mitsis
Anas Nashif
parent
7cb19c9952
commit
292ad9b757
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@ -6,20 +6,20 @@ Platform Configuration: fsl_frdm_k64f
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Overview
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********
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The fsl_frdm_k64f platform configuration is used by Zephyr projects
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The fsl_frdm_k64f platform configuration is used by Zephyr applications
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that run on the Freescale Freedom Development Platform (FRDM-K64F).
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It provides support for an ARM Cortex-M4 CPU and the following devices:
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* :abbr:`Nested Vectored interrupt controller (NVIC)`
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* Nested Vectored Interrupt Controller (NVIC)
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* :abbr:`System Tick system clock (SYSTICK)`
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* System Tick System Clock (SYSTICK)
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* serial port over USB (K20)
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* Serial Port over USB (K20)
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See `Procedures`_ for using third-party tools to load
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and debug (in system mode with no OS awareness) a
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Zephyr-based project on the target. Debugging is
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done with :abbr:`GNU Debugger (GDB)`, using Eclipse plugins.
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Zephyr application image on the target. Debugging is
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done with GNU Debugger (GDB), using Eclipse plugins.
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.. note::
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This platform configuration may work with similar boards,
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@ -31,7 +31,8 @@ Supported Boards
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The fsl_frdm_k64f platform configuration has been tested to run on the
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Freescale Freedom Development Platform. The physical characteristics of
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this board (including pin names, jumper settings, memory mappings, ...)
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can be found below.
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can be found below. No claims are made about its suitability for use with
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any other hardware system.
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Pin Names
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=========
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@ -92,7 +93,7 @@ Pin Names
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Jumpers & Switches
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==================
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Zephyr Project uses the FRDM-K64F default switch and jumper settings.
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The Zephyr kernel uses the FRDM-K64F default switch and jumper settings.
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The default switch settings for the Freescale FRDM-K64F are:
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@ -109,7 +110,7 @@ The default switch settings for the Freescale FRDM-K64F are:
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Memory Mappings
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===============
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The :file:`fsl_frdm_k64f` platform configuration uses the
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The fsl_frdm_k64f platform configuration uses the
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following default hardware memory map addresses and sizes:
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+--------------------------+---------+------------------+
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@ -197,7 +198,7 @@ hardware features:
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+--------------+------------+----------------------+
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Other hardware features are not currently supported by Zephyr Project.
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Other hardware features are not currently supported by the Zephyr kernel.
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See `vendor documentation`_ for a complete list of
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Freescale FRDM-K64F board hardware features.
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@ -221,7 +222,7 @@ Handlers are provided for exceptions 1-6, 11-12, and 14-15.
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The table here identifies the handlers used for each exception.
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+------+------------+----------------+--------------------------+
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| Exc# | Name | Remarks | Used by Zephyr Project |
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| Exc# | Name | Remarks | Used by Zephyr Kernel |
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+======+============+================+==========================+
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| 1 | Reset | | system initialization |
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+------+------------+----------------+--------------------------+
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@ -319,9 +320,9 @@ table options:
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:option:`SW_ISR_TABLE` and :option:`SW_ISR_TABLE_DYNAMIC`
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Depending on whether static tables are provided by the fsl_frdm_k64f
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platform configuration or
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the project, two other kconfig options are available:
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Depending on whether static tables are provided by the platform
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configuration or by the application, two other kconfig options
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are available:
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:option:`SW_ISR_TABLE_STATIC_CUSTOM` and
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:option:`IRQ_VECTOR_TABLE_CUSTOM`
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@ -347,7 +348,7 @@ The following interrupt table scenarios exist:
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In this scenario, some demuxing must take place which
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causes a delay before the ISR runs. On the plus side,
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the vector table can be automatically generated by Zephyr Project.
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the vector table can be automatically generated by the Zephyr kernel.
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Also, an argument can be passed to the ISR, allowing
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multiple devices of the same type to share the same ISR.
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Sharing an ISR can potentially save as much, or even more,
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@ -365,12 +366,12 @@ The following interrupt table scenarios exist:
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and pre-populated. ISRs can have arguments with an automatic
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exception handling epilogue. Table pre-population provides
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better boot performance because there is no call to
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:c:func:`irq_connect` during boot up, however,
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the user must provide a file (C or assembly). In the platform
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configuration, the file is :file:`sw_isr_table.c`,
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but it can have any name. This file contains the :makevar:`_IsrTable[]`
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variable filled by hand with each interrupt's ISRs. The variable
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is an array of type struct_IsrTableEntry. When a user
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:c:func:`irq_connect` during boot up; however,
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the user must provide a file to override the platform's
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default ISR table defined in :file:`sw_isr_table.S`.
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This file must contain the :makevar:`_sw_isr_table[]`
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variable initialized with each interrupt's ISR. The variable
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is an array of type struct _IsrTableEntry. When a user
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provides their own :file:`sw_isr_table.c`, the type can be found
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by including :file:`sw_isr_table.h`.
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@ -379,15 +380,14 @@ The following interrupt table scenarios exist:
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the best performance.
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In this setup, there is no software table. ISRs are installed
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directly in the vector table using the _IrqVectorTable symbol
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directly in the vector table using the **_irq_vector_table** symbol
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in the .irq_vector_table section. The symbol resolves to an
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array of words containing the addresses of ISRs. The linker
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script puts that section directly
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after the section containing the first 16 exception vectors
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(.exc_vector_table) to form the full vector table in ROM.
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An example of this can be found in the :file:`irq_vector_table.s`
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file provided by the fsl_frdm_k64f platform configuration.
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Because ISRs
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An example of this can be found in the platform's
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:file:`irq_vector_table.c`. Because ISRs
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hook directly into the vector table, this setup gives the best
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possible performance regarding latency when handling interrupts.
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@ -399,15 +399,14 @@ The following interrupt table scenarios exist:
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This configuration prevents the use of tickless idle.
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:option:`SW_ISR_TABLE=y`, :option:`SW_ISR_TABLE_STATIC_CUSTOM=y`
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For overriding the static ISR tables defined by the platform
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configuration:
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For overriding the static ISR tables defined by the platform:
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In this setup, the platform configuration provides the **_IsrTable** symbol
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and data using a :file:`sw_isr_table.s` or :file:`sw_isr_table.c` file.
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In this setup, the platform provides the **_irq_vector_table**
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symbol and data in :file:`sw_isr_table.s`.
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:option:`SW_ISR_TABLE=n`, :option:`IRQ_VECTOR_TABLE_CUSTOM=y`
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In this setup, the platform configuration provides the **_IrqVectorTable** symbol
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and data using a :file:`irq_vector_table.s` or :file:`irq_vector_table.c` file.
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In this setup, the platform provides the **_irq_vector_table** symbol
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and data in `irq_vector_table.c`.
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Configuration Options
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=====================
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@ -434,8 +433,7 @@ Configuration Options
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:option:`NUM_IRQS`
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The platform configuration sets this value to the correct number of
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interrupts available on the board. The default is '1',
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which in most cases will be incorrect.
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interrupts available on the board. The default is '34'.
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:option:`SW_ISR_TABLE`
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Set to 'n' when the platform configuration does not provide one.
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@ -714,7 +712,7 @@ from the shell.
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Prerequisites
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-------------
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* Have the Zephyr executable image file saved as a binary file.
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* Have the Zephyr application image file saved as a binary file.
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(The build should have created this binary file automatically.)
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@ -760,7 +758,7 @@ There is no support for the following:
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However, using a XIP kernel effectively provides
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TEXT/RODATA write protection in ROM.
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* SRAM at addresses 0x1FFF0000-0x0x1FFFFFFF
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* SRAM at addresses 0x1FFF0000-0x1FFFFFFF
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* Writing to the hardware's flash memory
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