OrgZephyr/zephyr
OrgZephyr
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr.git
1
0
Fork 0
Code Issues Releases Wiki Activity

drivers: flash stm32 flash driver includes stm32u5 serie 

This adds the stm32U5 soc family to the flash driver
The flash controller has particular register names in the Non-Secure
area to be adapted for the driver.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2022-02-07 09:59:05 +01:00 committed by Marti Bolivar
parent 6a76b9844d
commit 269adf5ca8
3 changed files with 26 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/flash/Kconfig.stm32
View File

@ -4,10 +4,14 @@
# Copyright (c) 2017 BayLibre, SAS
# SPDX-License-Identifier: Apache-2.0
DT_COMPAT_ST_STM32_FLASH_CONTROLLER := st,stm32-flash-controller
DT_COMPAT_ST_STM32H7_FLASH_CONTROLLER := st,stm32h7-flash-controller
config SOC_FLASH_STM32
bool "STM32 flash driver"
depends on SOC_FAMILY_STM32
depends on (SOC_SERIES_STM32F0X || SOC_SERIES_STM32F1X || SOC_SERIES_STM32F2X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32L1X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32L5X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32WLX || SOC_SERIES_STM32G0X || SOC_SERIES_STM32G4X || SOC_SERIES_STM32H7X)
depends on $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_FLASH_CONTROLLER)) || \
$(dt_compat_enabled,$(DT_COMPAT_ST_STM32H7_FLASH_CONTROLLER))
select FLASH_HAS_DRIVER_ENABLED
default y
select SOC_FLASH_STM32_V1 if SOC_SERIES_STM32F0X
@ -21,6 +25,7 @@ config SOC_FLASH_STM32
select FLASH_PAGE_LAYOUT if SOC_SERIES_STM32F7X
select FLASH_PAGE_LAYOUT if SOC_SERIES_STM32L4X
select FLASH_PAGE_LAYOUT if SOC_SERIES_STM32L5X
select FLASH_PAGE_LAYOUT if SOC_SERIES_STM32U5X
select FLASH_PAGE_LAYOUT if SOC_SERIES_STM32WBX
select FLASH_PAGE_LAYOUT if SOC_SERIES_STM32WLX
select FLASH_PAGE_LAYOUT if SOC_SERIES_STM32G4X
@ -31,6 +36,7 @@ config SOC_FLASH_STM32
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32F7X
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32L4X
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32L5X
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32U5X
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32WBX
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32WLX
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32G4X
@ -38,7 +44,7 @@ config SOC_FLASH_STM32
select MPU_ALLOW_FLASH_WRITE if ARM_MPU
help
Enable STM32F0x, STM32F1x, STM32F2x, STM32F3x, STM32F4x, STM32F7x,
STM32L0x, STM32L1x, STM32L4x, STM32L5x, STM32WBx, STM32WLx, STM32G0x,
STM32L0x, STM32L1x, STM32L4x, STM32L5x, STM32U5x, STM32WBx, STM32WLx, STM32G0x,
STM32G4x or STM3H7x series flash driver.
config SOC_FLASH_STM32_V1

5
drivers/flash/flash_stm32.c
View File

@ -122,7 +122,8 @@ static void flash_stm32_flush_caches(const struct device *dev,
off_t offset, size_t len)
{
#if defined(CONFIG_SOC_SERIES_STM32F0X) || defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32G0X) || defined(CONFIG_SOC_SERIES_STM32L5X)
defined(CONFIG_SOC_SERIES_STM32G0X) || defined(CONFIG_SOC_SERIES_STM32L5X) || \
defined(CONFIG_SOC_SERIES_STM32U5X)
ARG_UNUSED(dev);
ARG_UNUSED(offset);
ARG_UNUSED(len);
@ -336,7 +337,7 @@ static const struct flash_driver_api flash_stm32_api = {
static int stm32_flash_init(const struct device *dev)
{
int rc;
/* Below is applicable to F0, F1, F3, G0, G4, L1, L4, L5 & WB55 series.
/* Below is applicable to F0, F1, F3, G0, G4, L1, L4, L5, U5 & WB55 series.
* For F2, F4, F7 & H7 series, this is not applicable.
*/
#if DT_INST_NODE_HAS_PROP(0, clocks)

16
drivers/flash/flash_stm32.h
View File

@ -34,7 +34,7 @@ struct flash_stm32_priv {
#endif
/* Differentiate between arm trust-zone non-secure/secure, and others. */
#if defined(FLASH_NSSR_NSBSY) /* For mcu w. TZ in non-secure mode */
#if defined(FLASH_NSSR_NSBSY) || defined(FLASH_NSSR_BSY) /* For mcu w. TZ in non-secure mode */
#define FLASH_SECURITY_NS
#define FLASH_STM32_SR NSSR
#elif defined(FLASH_SECSR_SECBSY) /* For mcu w. TZ in secured mode */
@ -53,6 +53,20 @@ struct flash_stm32_priv {
/* Redefinitions of flags and masks to harmonize stm32 series: */
#if defined(CONFIG_SOC_SERIES_STM32U5X)
#define FLASH_NSCR_NSLOCK FLASH_NSCR_LOCK
#define FLASH_OPTR_DBANK FLASH_OPTR_DUALBANK
#define FLASH_NSCR_NSPG FLASH_NSCR_PG
#define FLASH_NSCR_NSBKER_Msk FLASH_NSCR_BKER_Msk
#define FLASH_NSCR_NSBKER FLASH_NSCR_BKER
#define FLASH_NSCR_NSPER FLASH_NSCR_PER
#define FLASH_NSCR_NSPNB_Msk FLASH_NSCR_PNB_Msk
#define FLASH_NSCR_NSPNB_Pos FLASH_NSCR_PNB_Pos
#define FLASH_NSCR_NSPNB FLASH_NSCR_PNB
#define FLASH_NSCR_NSSTRT FLASH_NSCR_STRT
#define FLASH_PAGE_SIZE_128_BITS FLASH_PAGE_SIZE
#endif /* CONFIG_SOC_SERIES_STM32U5X */
#if defined(CONFIG_SOC_SERIES_STM32G0X)
#if defined(FLASH_FLAG_BSY2)
#define FLASH_STM32_SR_BUSY (FLASH_FLAG_BSY1 | FLASH_FLAG_BSY2);