From 0710aa69c36ed6900efe1bfa75d315a255c390a2 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Wed, 14 Apr 2021 16:21:03 +0200 Subject: [PATCH] include/drivers/clock_control: stm32: Update for F0/F3/G0/G4 support Update macros for STM32F0/F3/G0/G4 clock configuration. Additionally update matching drivers. Signed-off-by: Erwan Gouriou --- drivers/clock_control/clock_stm32f0_f3.c | 6 ++-- drivers/clock_control/clock_stm32g4.c | 2 +- .../clock_control/stm32_clock_control.h | 28 ++++++++++++++----- 3 files changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/clock_control/clock_stm32f0_f3.c b/drivers/clock_control/clock_stm32f0_f3.c index 4925e363091..ebfd10b3fd5 100644 --- a/drivers/clock_control/clock_stm32f0_f3.c +++ b/drivers/clock_control/clock_stm32f0_f3.c @@ -31,7 +31,7 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit) * ... * 16 -> LL_RCC_PLL_MUL_16 -> 0x00380000 */ - pllinit->PLLMul = ((CONFIG_CLOCK_STM32_PLL_MULTIPLIER - 2) + pllinit->PLLMul = ((STM32_PLL_MULTIPLIER - 2) << RCC_CFGR_PLLMUL_Pos); /* @@ -49,9 +49,9 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit) * STM32F030xC, STM32F302xE, STM32F303xE and STM32F39xx * cf Reference manual for more details */ - pllinit->PLLDiv = CONFIG_CLOCK_STM32_PLL_PREDIV1 - 1; + pllinit->PLLDiv = STM32_PLL_PREDIV1 - 1; #else - pllinit->Prediv = CONFIG_CLOCK_STM32_PLL_PREDIV - 1; + pllinit->Prediv = STM32_PLL_PREDIV - 1; #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */ } diff --git a/drivers/clock_control/clock_stm32g4.c b/drivers/clock_control/clock_stm32g4.c index e0959d5ec38..f014af318ea 100644 --- a/drivers/clock_control/clock_stm32g4.c +++ b/drivers/clock_control/clock_stm32g4.c @@ -49,7 +49,7 @@ void config_enable_default_clocks(void) /* Enable the power interface clock */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); -#ifdef CONFIG_CLOCK_STM32_LSE +#ifdef STM32_LSE /* LSE belongs to the back-up domain, enable access.*/ /* Set the DBP bit in the Power control register 1 (PWR_CR1) */ diff --git a/include/drivers/clock_control/stm32_clock_control.h b/include/drivers/clock_control/stm32_clock_control.h index 9d467f714cc..d97388d9cfd 100644 --- a/include/drivers/clock_control/stm32_clock_control.h +++ b/include/drivers/clock_control/stm32_clock_control.h @@ -28,13 +28,15 @@ * Kconfig related symbols. */ -#if DT_NODE_HAS_PROP(DT_INST(0, st_stm32_rcc), ahb_prescaler) +#if DT_NODE_HAS_PROP(DT_INST(0, st_stm32_rcc), ahb_prescaler) || \ + DT_NODE_HAS_PROP(DT_INST(0, st_stm32f0_rcc), ahb_prescaler) #define STM32_AHB_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb_prescaler) #else #define STM32_AHB_PRESCALER CONFIG_CLOCK_STM32_AHB_PRESCALER #endif -#if DT_NODE_HAS_PROP(DT_INST(0, st_stm32_rcc), apb1_prescaler) +#if DT_NODE_HAS_PROP(DT_INST(0, st_stm32_rcc), apb1_prescaler) || \ + DT_NODE_HAS_PROP(DT_INST(0, st_stm32f0_rcc), apb1_prescaler) #define STM32_APB1_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb1_prescaler) #else #define STM32_APB1_PRESCALER CONFIG_CLOCK_STM32_APB1_PRESCALER @@ -42,7 +44,8 @@ #if DT_NODE_HAS_PROP(DT_INST(0, st_stm32_rcc), apb2_prescaler) #define STM32_APB2_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb2_prescaler) -#else +#elif !DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32f0_rcc, okay) + /* This should not be defined in F0 binding case */ #define STM32_APB2_PRESCALER CONFIG_CLOCK_STM32_APB2_PRESCALER #endif @@ -68,7 +71,9 @@ #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l4_pll_clock, okay) || \ DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wb_pll_clock, okay) || \ - DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay) + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay) || \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g4_pll_clock, okay) || \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g0_pll_clock, okay) #define STM32_PLL_M_DIVISOR DT_PROP(DT_NODELABEL(pll), div_m) #define STM32_PLL_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul_n) #define STM32_PLL_P_DIVISOR DT_PROP(DT_NODELABEL(pll), div_p) @@ -85,18 +90,24 @@ #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) #define STM32_PLL_XTPRE DT_PROP(DT_NODELABEL(pll), xtre) #define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul) -#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay) +#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay) || \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f0_pll_clock, okay) #define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul) #define STM32_PLL_PREDIV1 DT_PROP(DT_NODELABEL(pll), prediv) +/* We don't need to make a disctinction between PREDIV and PREDIV1 in dts */ +/* As PREDIV and PREDIV1 have the same description we can use prop prediv for both */ +#define STM32_PLL_PREDIV STM32_PLL_PREDIV1 #else #define STM32_PLL_XTPRE CONFIG_CLOCK_STM32_PLL_XTPRE #define STM32_PLL_MULTIPLIER CONFIG_CLOCK_STM32_PLL_MULTIPLIER #define STM32_PLL_PREDIV1 CONFIG_CLOCK_STM32_PLL_PREDIV1 +#define STM32_PLL_PREDIV CONFIG_CLOCK_STM32_PLL_PREDIV #endif #define DT_RCC_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(rcc)) -#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32_rcc, okay) && \ +#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32_rcc, okay) || \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32f0_rcc, okay)) && \ DT_NODE_HAS_PROP(DT_NODELABEL(rcc), clocks) #define STM32_SYSCLK_SRC_PLL DT_NODE_HAS_PROP(DT_NODELABEL(rcc), clocks) && \ DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(pll)) @@ -119,7 +130,10 @@ DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wb_pll_clock, okay) || \ DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay) || \ DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) || \ - DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay)) && \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay) || \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f0_pll_clock, okay) || \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g4_pll_clock, okay) || \ + DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g0_pll_clock, okay)) && \ DT_NODE_HAS_PROP(DT_NODELABEL(pll), clocks) #define STM32_PLL_SRC_MSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msi)) #define STM32_PLL_SRC_HSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))