36 lines
654 B
Plaintext
36 lines
654 B
Plaintext
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/*
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* Copyright (c) 2020 Jonas Eriksson, Up to Code AB
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*
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* SoC device tree include for STM32F100xE SoCs
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/f1/stm32f100Xb.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(512)>;
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};
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};
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spi3: spi@40003c00 {
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compatible = "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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status = "disabled";
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label = "SPI_3";
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};
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};
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};
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