90 lines
2.6 KiB
ArmAsm
90 lines
2.6 KiB
ArmAsm
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/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief kernel swapper code for Xtensa
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*
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* This module implements the _Swap() routine for the Xtensa architecture.
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*/
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#include <xtensa_context.h>
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#include <kernel_arch_data.h>
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#include <offsets_short.h>
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.extern _kernel
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/**
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unsigned int _Swap (unsigned int basepri);
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*/
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.globl _Swap
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.type _Swap,@function
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.align 4
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_Swap:
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#ifdef __XTENSA_CALL0_ABI__
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addi sp, sp, -XT_SOL_FRMSZ
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#else
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entry sp, XT_SOL_FRMSZ
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#endif
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s32i a0, sp, XT_SOL_pc
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s32i a2, sp, XT_SOL_ps
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#ifdef __XTENSA_CALL0_ABI__
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s32i a12, sp, XT_SOL_a12 /* save callee-saved registers */
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s32i a13, sp, XT_SOL_a13
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s32i a14, sp, XT_SOL_a14
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s32i a15, sp, XT_SOL_a15
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#else
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/* Spill register windows. Calling xthal_window_spill() causes extra */
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/* spills and reloads, so we will set things up to call the _nw version */
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/* instead to save cycles. */
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movi a6, ~(PS_WOE_MASK|PS_INTLEVEL_MASK) /* spills a4-a7 if needed */
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and a2, a2, a6 /* clear WOE, INTLEVEL */
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addi a2, a2, XCHAL_EXCM_LEVEL /* set INTLEVEL */
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wsr a2, PS
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rsync
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call0 xthal_window_spill_nw
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l32i a2, sp, XT_SOL_ps /* restore PS */
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addi a2, a2, XCHAL_EXCM_LEVEL
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wsr a2, PS
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#endif
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#if XCHAL_CP_NUM > 0
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/* Save coprocessor callee-saved state (if any). At this point CPENABLE */
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/* should still reflect which CPs were in use (enabled). */
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call0 _xt_coproc_savecs
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#endif
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movi a2, _kernel
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movi a3, 0
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l32i a4, a2, KERNEL_OFFSET(current) /* a4 := _kernel->current */
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s32i a3, sp, XT_SOL_exit /* 0 to flag as solicited frame */
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s32i sp, a4, THREAD_OFFSET(sp) /* sp := current->arch.topOfStack */
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#if XCHAL_CP_NUM > 0
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/* Clear CPENABLE, also in task's co-processor state save area. */
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movi a3, 0
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l32i a4, a4, THREAD_OFFSET(cpStack) /* a4 := current->arch.preempCoprocReg.cpStack */
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wsr a3, CPENABLE
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beqz a4, 1f
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s16i a3, a4, XT_CPENABLE /* clear saved cpenable */
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1:
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#endif
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#ifdef CONFIG_KERNEL_EVENT_LOGGER_CONTEXT_SWITCH
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/* Register the context switch */
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#ifdef __XTENSA_CALL0_ABI__
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call0 _sys_k_event_logger_context_switch
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#else
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call4 _sys_k_event_logger_context_switch
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#endif
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#endif
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l32i a2, a2, KERNEL_OFFSET(ready_q_cache)
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/*
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* At this point, the a2 register contains the 'k_thread *' of the
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* thread to be swapped in.
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*/
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call0 _zxt_dispatch
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/* Never reaches here. */
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