21 lines
428 B
Plaintext
21 lines
428 B
Plaintext
|
/*
|
||
|
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
|
||
|
* SPDX-License-Identifier: Apache-2.0
|
||
|
*/
|
||
|
|
||
|
#include <st/h7/stm32h7.dtsi>
|
||
|
|
||
|
/ {
|
||
|
/* DTCM memory directly coppled to CPU */
|
||
|
dtcm: memory@20000000 {
|
||
|
compatible = "arm,dtcm";
|
||
|
reg = <0x20000000 DT_SIZE_K(128)>;
|
||
|
};
|
||
|
|
||
|
/* AXI SRAM in D1 domain (AXI bus) */
|
||
|
sram0: memory@24000000 {
|
||
|
reg = <0x24000000 DT_SIZE_K(128)>;
|
||
|
compatible = "mmio-sram";
|
||
|
};
|
||
|
};
|