zephyr/soc/x86/intel_quark/quark_se/soc_power.h

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/*
* Copyright (c) 2016 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_POWER_H_
#define _SOC_POWER_H_
#ifdef __cplusplus
extern "C" {
#endif
quark_se: PM: Add multicore support This patch changes Quark SE power drivers to support multicore scenarios e.g. both LMT and ARC core are enabled and manage power. Handling LPS states in multicore scenarios are dead simple because LPS states are core-specific states. It means that putting the LMT core in LPS doesn't affect the ARC core, and vice-versa. DEEP_SLEEP state, on the other hand, affects both cores since it turns power off from the SoC and both cores are shutdown. It means that if LMT puts the system in DEEP_SLEEP, ARC core is shutdown even if it is busy handling some task. In order to support the multicore scenario, this patch introduces the SYS_POWER_STATE_DEEP_SLEEP_2 state to both ARC and x86 power drivers. On ARC, this state works as following: 1) Save ARC execution context; 2) Raise a flag to inform the x86 core that ARC is ready to enter in DEEP_SLEEP; 3) Enter in the lowest core-specific power state, which in this case is LPSS. On x86, DEEP_SLEEP_2 is very similar to DEEP_SLEEP. The difference relies in the post_ops() which calls _arc_init() in order to start ARC core so it can restore its context. This patch also adds the test/power/multicore/ directory which provides sample application to x86 and ARC cores in order to easily verify the multicore support. In test/power/multicore/README.rst you can find more details regarding the applications. Jira: ZEP-1103 Change-Id: Ie28ba6d193ea0e58fca69d38f8d3c38ca259a9ef Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-12-22 05:26:17 +08:00
/*
* Bit 0 from GP0 register is used internally by the kernel
* to handle PM multicore support. Any change on QMSI and/or
* bootloader which affects this bit should take it in
* consideration.
*/
#define GP0_BIT_SLEEP_READY BIT(0)
enum power_states {
SYS_POWER_STATE_CPU_LPS, /* C1 state */
SYS_POWER_STATE_CPU_LPS_1, /* C2 state */
SYS_POWER_STATE_CPU_LPS_2, /* C2LP state */
SYS_POWER_STATE_DEEP_SLEEP, /* SLEEP state */
SYS_POWER_STATE_DEEP_SLEEP_1, /* SLEEP state with LPMODE enabled */
SYS_POWER_STATE_MAX
};
/**
* @brief Put processor into low power state
*
* This function implements the SoC specific details necessary
* to put the processor into available power states.
*
* Wake up considerations:
* SYS_POWER_STATE_CPU_LPS: Any interrupt works as wake event.
*
* SYS_POWER_STATE_CPU_LPS_1: Any interrupt works as wake event except
* if the core enters LPSS where SYS_POWER_STATE_DEEP_SLEEP wake events
* applies.
*
* SYS_POWER_STATE_CPU_LPS_2: Any interrupt works as wake event except the
* PIC timer which is gated. If the core enters LPSS only
* SYS_POWER_STATE_DEEP_SLEEP wake events applies.
*
* SYS_POWER_STATE_DEEP_SLEEP: Only Always-On peripherals can wake up
* the SoC. This consists of the Counter, RTC, GPIO 1 and AIO Comparator.
*
* SYS_POWER_STATE_DEEP_SLEEP_1: Only Always-On peripherals can wake up
* the SoC. This consists of the Counter, RTC, GPIO 1 and AIO Comparator.
*/
void _sys_soc_set_power_state(enum power_states state);
/**
* @brief Do any SoC or architecture specific post ops after low power states.
*
* This function is a place holder to do any operations that may
* be needed to be done after deep sleep exits. Currently it enables
* interrupts after resuming from deep sleep. In future, the enabling
* of interrupts may be moved into the kernel.
*/
void _sys_soc_power_state_post_ops(enum power_states state);
quark_se: PM: Add multicore support This patch changes Quark SE power drivers to support multicore scenarios e.g. both LMT and ARC core are enabled and manage power. Handling LPS states in multicore scenarios are dead simple because LPS states are core-specific states. It means that putting the LMT core in LPS doesn't affect the ARC core, and vice-versa. DEEP_SLEEP state, on the other hand, affects both cores since it turns power off from the SoC and both cores are shutdown. It means that if LMT puts the system in DEEP_SLEEP, ARC core is shutdown even if it is busy handling some task. In order to support the multicore scenario, this patch introduces the SYS_POWER_STATE_DEEP_SLEEP_2 state to both ARC and x86 power drivers. On ARC, this state works as following: 1) Save ARC execution context; 2) Raise a flag to inform the x86 core that ARC is ready to enter in DEEP_SLEEP; 3) Enter in the lowest core-specific power state, which in this case is LPSS. On x86, DEEP_SLEEP_2 is very similar to DEEP_SLEEP. The difference relies in the post_ops() which calls _arc_init() in order to start ARC core so it can restore its context. This patch also adds the test/power/multicore/ directory which provides sample application to x86 and ARC cores in order to easily verify the multicore support. In test/power/multicore/README.rst you can find more details regarding the applications. Jira: ZEP-1103 Change-Id: Ie28ba6d193ea0e58fca69d38f8d3c38ca259a9ef Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-12-22 05:26:17 +08:00
/**
* @brief Check if ARC core is ready to enter in DEEP_SLEEP states.
*
* @retval true If ARC is ready.
* @retval false Otherwise.
*/
bool _sys_soc_power_state_is_arc_ready(void);
#ifdef __cplusplus
}
#endif
#endif /* _SOC_POWER_H_ */