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zephyr/soc/arm/st_stm32/stm32h7/soc.h

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soc/arm: Provide basic support for STM32H7 series Enable basic support to STM32H7, in single core configuration (M7). Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:05:55 +08:00
/*
* Copyright (c) 2019 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _STM32F7_SOC_H_
#define _STM32F7_SOC_H_
#ifndef _ASMLANGUAGE
#include <stm32h7xx.h>
/* ARM CMSIS definitions must be included before kernel_includes.h.
* Therefore, it is essential to include kernel_includes.h after including
* core SOC-specific headers.
*/
#include <kernel_includes.h>
soc: stm32h7: Add support for Cortex-M4 core Add support for C-M4 core on STM32H7 series. It is enabled in Dual core context with 2 alternatives boot methods: * Boot CM4 CM7: Both core boot at reset, then CM4 enters Stop mode. CM7 performs system configuration then finally wakes up CM4 * Boot CM7, CM4 Gated: Only CM7 boots at reset. Once done with system configuration it triggers (requires option byte update) Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:26:13 +08:00
#ifdef CONFIG_STM32H7_DUAL_CORE
#define LL_HSEM_ID_0 (0U) /* HW semaphore 0 */
#define LL_HSEM_MASK_0 (1 << LL_HSEM_ID_0)
drivers/gpio: stm32: Add semaphore on gpio_configure Protect gpio_configure function in dual core context. This operation is not needed for other fuctions of the api: * init * read * write Protecting gpio_configure also protects access to interrupt_controller IP. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:27:08 +08:00
#define LL_HSEM_ID_1 (1U) /* HW semaphore 1 */
#define LL_HSEM_MASK_1 (1 << LL_HSEM_ID_1)
soc: stm32h7: Add support for Cortex-M4 core Add support for C-M4 core on STM32H7 series. It is enabled in Dual core context with 2 alternatives boot methods: * Boot CM4 CM7: Both core boot at reset, then CM4 enters Stop mode. CM7 performs system configuration then finally wakes up CM4 * Boot CM7, CM4 Gated: Only CM7 boots at reset. Once done with system configuration it triggers (requires option byte update) Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:26:13 +08:00
#include <stm32h7xx_ll_hsem.h>
#ifdef CONFIG_CPU_CORTEX_M4
#include <stm32h7xx_ll_bus.h>
#include <stm32h7xx_ll_pwr.h>
#include <stm32h7xx_ll_cortex.h>
#endif /* CONFIG_CPU_CORTEX_M4 */
#endif /* CONFIG_STM32H7_DUAL_CORE */
drivers/clock_control: STM32H7 support Provide basic clock control driver for STM32H7. Bus clock activation is done through CM7 and CM4 common registers so we don't have to care to the CPU Id before accessing. Accesses are not protected for now. Only possible configuration is system clock source set to HSE driven PLL. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:12:48 +08:00
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
#include <stm32h7xx_ll_bus.h>
#include <stm32h7xx_ll_rcc.h>
#include <stm32h7xx_ll_pwr.h>
#include <stm32h7xx_ll_system.h>
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
drivers/interrupt_controller: stm32: Add support for stm32h7 Add bare minimum to enable EXTI on STM32H7, in single core configuration. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:16:35 +08:00
#ifdef CONFIG_EXTI_STM32
#include <stm32h7xx_ll_exti.h>
#endif /* CONFIG_EXTI_STM32 */
drivers/gpio: Add support on STM32H7 series Add GPIO support on STM32H7. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:22:59 +08:00
#ifdef CONFIG_GPIO_STM32
#include <stm32h7xx_ll_gpio.h>
#include <stm32h7xx_ll_system.h>
#endif /* CONFIG_GPIO_STM32 */
drivers/serial: stm32: Add support for STM32H7 series Add needful to enable uart on STM32H7. This mostly impact dts but as well soc for fixup. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:23:43 +08:00
#ifdef CONFIG_SERIAL_HAS_DRIVER
#include <stm32h7xx_ll_usart.h>
#endif /* CONFIG_SERIAL_HAS_DRIVER */
soc/arm: Provide basic support for STM32H7 series Enable basic support to STM32H7, in single core configuration (M7). Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-01 20:05:55 +08:00
#endif /* !_ASMLANGUAGE */
#endif /* _STM32F7_SOC_H7_ */