2024-05-28 18:17:02 +08:00
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/*
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* Copyright (c) 2024 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/wb0/stm32wb0.dtsi>
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/ {
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soc {
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compatible = "st,stm32wb07", "st,stm32wb0", "simple-bus";
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flash: flash-controller@40001000 {
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flash0: flash@10040000 {
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reg = <0x10040000 DT_SIZE_K(256)>;
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};
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};
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2024-10-15 17:40:53 +08:00
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i2c2: i2c@41001000 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x41001000 DT_SIZE_K(1)>;
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2024-10-25 15:43:02 +08:00
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clocks = <&rcc STM32_CLOCK(APB1, 23)>;
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2024-10-15 17:40:53 +08:00
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interrupts = <4 0>;
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interrupt-names = "combined";
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status = "disabled";
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};
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spi1: spi@41002000 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x41002000 DT_SIZE_K(1)>;
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2024-10-25 15:43:02 +08:00
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clocks = <&rcc STM32_CLOCK(APB1, 0)>;
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2024-10-15 17:40:53 +08:00
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interrupts = <5 0>;
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status = "disabled";
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};
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spi2: spi@41003000 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x41003000 DT_SIZE_K(1)>;
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2024-10-25 15:43:02 +08:00
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clocks = <&rcc STM32_CLOCK(APB1, 12)>;
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2024-10-15 17:40:53 +08:00
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interrupts = <6 0>;
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status = "disabled";
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};
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2024-05-28 18:17:02 +08:00
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};
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};
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