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zephyr/soc/microchip/mec/mec15xx/soc.h

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soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
/*
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __MEC_SOC_H
#define __MEC_SOC_H
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(48)
#ifndef _ASMLANGUAGE
#include "MEC1501hsz.h"
#include "regaccess.h"
soc: arm: microchip: add common mec_gpio.h add common mec_gpio.h to allow access to common gpio_regs structure for both mec15xx and mec17xx, used in pinctrl driver Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-09-27 04:37:05 +08:00
/* common SoC API */
soc: arm: microchip: update mec1501 soc header update mec1501 soc.h to include soc_dt.h for pinctrl related macros Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-09-15 05:39:45 +08:00
#include "../common/soc_dt.h"
soc : microchip_mec : Add gpio driver common definitions Macros and enums are included for supporting pin configuration settings. Entries to the dts_fixup were also included in order to configure port level settings. Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-04-10 16:45:16 +08:00
#include "../common/soc_gpio.h"
drivers: clock: Microchip XEC clock driver add MEC15xx support Add support for Microchip MEC15xx to the XEC clock control driver. MEC15xx 32KHz clock support uses the same 32KHz source for both the PLL and peripherals. MEC152x does not include the PCR clock monitor present in MEC172x. MEC15xx and MEC172x support internal silicon oscillator, parallel and single ended crystal inputs, and the 32KHZ_PIN input. MEC152x supports fall back to internal silicon OSC when VTR and 32KHZ_PIN are turned off. Therefore in MEC152x the internal silicon oscillator can only be disabled if using an external 32KHz which is always on. For MEC152x the driver will only use the PLL source clock device tree value. Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-11-17 01:07:42 +08:00
#include "../common/soc_pcr.h"
soc : microchip_mec : Add gpio driver common definitions Macros and enums are included for supporting pin configuration settings. Entries to the dts_fixup were also included in order to configure port level settings. Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-04-10 16:45:16 +08:00
#include "../common/soc_pins.h"
soc: microchip_mec: Add header for extracting eSPI data This header contains encoding offsets for all the eSPI channels which communicate data from/to the host. Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-10-22 02:26:49 +08:00
#include "../common/soc_espi_channels.h"
soc: microchip_mec: Prepare for MEC172x SAF version 2 Microchip MEC172x eSPI SAF has significant hardware changes requiring a new SAF configuration structure. In preparation for the MEC172x we move the current SAF header out of common to the MEC1501 subfolder, remove an unused and empty common header and remove includes of the moved headers from MEC172x. Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-20 06:16:07 +08:00
#include "soc_espi_saf_v1.h"
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
soc: arm: microchip: add common mec_gpio.h add common mec_gpio.h to allow access to common gpio_regs structure for both mec15xx and mec17xx, used in pinctrl driver Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-09-27 04:37:05 +08:00
/* common peripheral register defines */
#include "../common/reg/mec_gpio.h"
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
#endif
#endif