2024-03-08 06:42:56 +08:00
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/*
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* Copyright 2022-2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/rw/RW612-pinctrl.h>
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&pinctrl {
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pinmux_flexcomm3_usart: pinmux_flexcomm3_usart {
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group0 {
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pinmux = <IO_MUX_FC3_USART_DATA>;
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slew-rate = "normal";
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};
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};
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2024-03-14 05:45:18 +08:00
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pinmux_flexcomm0_spi: pinmux_flexcomm0_spi {
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group0 {
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pinmux = <IO_MUX_FC0_SPI_SS0_IO0>,
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<IO_MUX_FC0_SPI_SS0_IO2>,
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<IO_MUX_FC0_SPI_SS0_IO3>,
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<IO_MUX_FC0_SPI_SS0_IO4>;
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slew-rate = "ultra";
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};
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};
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2024-03-14 06:08:23 +08:00
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pinmux_flexcomm2_i2c: pinmux_flexcomm2_i2c {
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group0 {
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pinmux = <IO_MUX_FC2_I2C_16_17>;
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slew-rate = "normal";
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bias-pull-up;
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};
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};
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2024-03-14 04:32:54 +08:00
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pinmux_flexspi: pinmux_flexspi {
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group0 {
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pinmux = <IO_MUX_QUAD_SPI_FLASH_IO28
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IO_MUX_QUAD_SPI_FLASH_IO30
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IO_MUX_QUAD_SPI_FLASH_IO31
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IO_MUX_QUAD_SPI_FLASH_IO32
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IO_MUX_QUAD_SPI_FLASH_IO33
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IO_MUX_QUAD_SPI_FLASH_IO34>;
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slew-rate = "ultra";
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};
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group1 {
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pinmux = <IO_MUX_QUAD_SPI_FLASH_IO29>;
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slew-rate = "ultra";
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bias-pull-down;
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};
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};
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2024-03-08 06:42:56 +08:00
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};
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